- 您现在的位置：买卖IC网 > PDF目录10252 > LTC2442CG#TRPBF (Linear Technology)IC ADC 24BIT 250MSPS 36-SSOP PDF资料下载
参数资料
| 型号： | LTC2442CG#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 6/32页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 250MSPS 36-SSOP |
| 标准包装： | 2,000 |
| 位数： | 24 |
| 采样率（每秒）： | 8k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 50mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 36-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，双极；2 个差分，双极 |
| 配用： | DC979A-ND - BOARD DELTA SIGMA ADC LTC2442 |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
LTC2442
14
2442fa
For more information www.linear.com/LTC2442
Chip Select Input (CS)
The active LOW chip select, CS (Pin 35), is used to test the
conversion status and to enable the data output transfer
as described in the previous sections.
In addition, the CS signal can be used to trigger a new
conversion cycle before the entire serial data transfer has
been completed. The LTC2442 will abort any serial data
transfer in progress and start a new conversion cycle
anytime a LOW-to-HIGH transition is detected at the CS
pin after the converter has entered the data output state.
Serial Data Input (SDI)
The serial data input (SDI, Pin 33) is used to select the
speed/resolution and input channel of the LTC2442. SDI
is programmed by a serial input data stream under the
control of SCK during the data output cycle, see Figure 3.
Initially, after powering up, the device performs a conver-
sion with SEL+ = CH0, SEL– = CH1, OSR = 256 (output rate
nominally 879Hz), and 1X speedup mode (no Latency).
Once this first conversion is complete, the device enters
the sleep state and is ready to output the conversion result
and receive the serial data input stream programming the
speed/resolutionandinputchannelforthenextconversion.
At the conclusion of each conversion cycle, the device
enters this state.
In order to change the speed/resolution or input channel,
the first three bits shifted into the device are 101. This is
compatible with the programming sequence of all LTC
multichannel differential input
DSADCs. If the sequence
is set to 000 or 100, the following input data is ignored
(don’t care) and the previously selected speed/resolution
and channel remain valid for the next conversion. Combi-
nations other than 101, 100, and 000 of the three control
bits should be avoided.
If the first three bits shifted into the device are 101, then
the following five bits select the input channel for the fol-
lowing conversion (see Tables 3 and 4). The next five bits
select the speed/resolution and mode 1X (no Latency) 2X
(doubleoutputratewithoneconversionlatency),seeTable
4. If these five bits are set to all 0’s, the previous speed
remains selected for the next conversion. This is useful
in applications requiring a fixed output rate/resolution but
need to change the input channel.
When an update operation is initiated the first three bits
are 101. The following five bits are the channel address.
The first bit, SGL, determines if the input selection is
differential (SGL = 0) or single-ended (SGL = 1). For SGL
= 0, two adjacent channels can be selected to form a dif-
ferential input. For SGL = 1, one of 4 channels is selected
as the positive input. The negative input is COM for all
single ended operations. The next 4-bits (ODD, A2, A1,
A0) determine which channel is selected and its polarity,
(see Table 3). In order to remain software compatible with
LTCs other multi-channel
DSADCs, A2 and A1 are unused
and should be set low.
Speed Multiplier Mode
In addition to selecting the speed/resolution, a speed
multiplier mode is used to double the output rate while
maintaining the selected resolution. The last bit of the
5-bit speed/resolution control word (TWOX, see Table 4)
determines if the output rate is 1X (no speed increase) or
2X (double the selected speed).
While operating in the 1X mode, the device combines two
internal conversions for each conversion result in order
to remove the ADC offset. Every conversion cycle, the
offset and offset drift are transparently calibrated greatly
simplifying the user interface. The resulting conversion
resulthasnolatency.Thefirstconversionfollowinganewly
applications inForMation
相关PDF资料 |
PDF描述 |
|---|---|
| MS27467E17B35PD | CONN PLUG 55POS STRAIGHT W/PINS |
| IRS20124SPBF | IC DIGITAL AUDIO DRIVER 14-SOIC |
| AD7934BRUZ-REEL7 | IC ADC 12BIT 4CH 1.5MSPS 28TSSOP |
| MS3106F22-23S | CONN PLUG 8POS STRAIGHT W/SCKT |
| MS27467T11F99S | CONN PLUG 7POS STRAIGHT W/SCKT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2442IG#PBF | 功能描述:IC ADC 24BIT 4CH 36-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC2442IG#TRPBF | 功能描述:IC ADC 24BIT 250MSPS 36-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC2444CUHF | 功能描述:IC ADC 24BIT HI SPEED 38QFN RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| LTC2444CUHF#PBF | 功能描述:IC ADC 24BIT HI SPEED 38QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 其它有关文件:TSA1204 View All Specifications 标准包装:1 系列:- 位数:12 采样率（每秒）:20M 数据接口:并联 转换器数目:2 功率耗散（最大）:155mW 电压电源:模拟和数字 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:Digi-Reel® 输入数目和类型:4 个单端，单极；2 个差分，单极 产品目录页面:1156 (CN2011-ZH PDF) 其它名称:497-5435-6 |
| LTC2444CUHF#TR | 功能描述:IC ADC 24BIT HI SPEED 38QFN RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
发布紧急采购，3分钟左右您将得到回复。