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参数资料
| 型号： | LTC2482CDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 18/32页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 10-DFN |
| 标准包装： | 2,500 |
| 位数： | 16 |
| 采样率（每秒）： | 6.8 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 480µW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | DC941A-ND - BOARD DELTA SIGMA ADC LTC2482 |
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LTC2482
25
2482fc
APPLICATIONS INFORMATION
In applications where the reference and input common
mode voltages are different, extra errors are introduced.
For every 1V of the reference and input common mode volt-
age difference (VREFCM – VINCM) and a 5V reference, each
Ohm of reference source resistance introduces an extra
(VREFCM – VINCM)/(VREF REQ) full-scale gain error which
is 0.067ppm when using the internal oscillator (50Hz/60Hz
rejection). If an external clock is used, the corresponding
extra gain error is 0.22 10–6 fEOSCppm.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capacitors
and upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typically better than 0.5%. Such
a specication can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/°C) are
used for the external source impedance seen by VREF+
and GND, the expected drift of the dynamic current gain
error will be insignicant (about 1% of its value over the
entire temperature and voltage range). Even for the most
stringent applications a one-time calibration operation
may be sufcient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05μV typical and 0.5μV maximum
full-scale error.
Output Data Rate
When using its internal oscillator, the LTC2482 produces
6.8ps with a notch frequency of 55Hz, for simultaneous
50Hz/60Hz rejection. The actual output data rate will de-
pend upon the length of the sleep and data output phases
which are controlled by the user and which can be made
insignicantly short. When operated with an external
conversion clock (fO connected to an external oscillator),
the LTC2482 output data rate can be increased as desired.
The duration of the conversion phase is 41036/fEOSC.
An increase in fEOSC over the nominal 307.2kHz will
translate into a proportional increase in the maximum
output data rate. The increase in output rate is neverthe-
less accompanied by three potential effects, which must
be carefully considered.
First, a change in fEOSC will result in a proportional change
in the internal notch position and in a reduction of the
converter differential mode rejection at the power line fre-
quency. In many applications, the subsequent performance
degradation can be substantially reduced by relying upon
the LTC2482’s exceptional common mode rejection and by
carefully eliminating common mode to differential mode
conversion sources in the input circuit. The user should
avoid single-ended input lters and should maintain a
very high degree of matching and symmetry in the circuits
driving the IN+ and IN– pins.
Second, the increase in clock frequency will increase
proportionally the amount of sampling charge transferred
through the input and the reference pins. If large external
input and/or reference capacitors (CIN, CREF) are used, the
previous section provides formulae for evaluating the effect
of the source resistance upon the converter performance for
any value of fEOSC. If small external input and/or reference
capacitors (CIN, CREF) are used, the effect of the external
source resistance upon the LTC2482 typical performance
can be inferred from Figures 12, 13, 14 and 15 in which
the horizontal axis is scaled by 307200/fEOSC.
Third, an increase in the frequency of the external oscillator
above 1MHz (a more than 3
× increase in the output data
rate) will start to decrease the effectiveness of the internal
autocalibration circuits. This will result in a progressive
VIN/VREF (V)
–0.5
INL
(ppm
OF
V
REF
)
2
6
10
0.3
2482 F18
–2
–6
0
4
8
–4
–8
–10
–0.3
–0.1
0.1
0.5
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
CREF = 10μF
R = 1k
R = 500Ω
R = 100Ω
Figure 18. INL vs Differential Input Voltage and
Reference Source Resistance for CREF > 1μF
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2482IDD | 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 6.8sps 16-bit Serial 10-Pin DFN EP |
| LTC2482IDD#PBF | 功能描述:IC ADC 16BIT 10-DFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:microPOWER™ 位数:8 采样率（每秒）:1M 数据接口:串行，SPI? 转换器数目:1 功率耗散（最大）:- 电压电源:模拟和数字 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商设备封装:24-VQFN 裸露焊盘（4x4） 包装:Digi-Reel® 输入数目和类型:8 个单端，单极 产品目录页面:892 (CN2011-ZH PDF) 其它名称:296-25851-6 |
| LTC2482IDD#PBF | 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, DFN-10 |
| LTC2482IDD#TR | 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 6.8sps 16-bit Serial 10-Pin DFN EP T/R |
| LTC2482IDD#TRPBF | 功能描述:IC ADC 16BIT 10-DFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:2,500 系列:- 位数:16 采样率（每秒）:15 数据接口:MICROWIRE?，串行，SPI? 转换器数目:1 功率耗散（最大）:480µW 电压电源:单电源 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:38-WFQFN 裸露焊盘 供应商设备封装:38-QFN（5x7） 包装:带卷 (TR) 输入数目和类型:16 个单端，双极；8 个差分，双极 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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