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| 型号： | LTC2492IDE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/36页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT DELTA SIG 14-DFN |
| 标准包装： | 2,500 |
| 位数： | 24 |
| 采样率（每秒）： | 7.5 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 800µW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 供应商设备封装： | 14-DFN-EP（4x3） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，双极；2 个差分，双极 |
| 配用： | DC1009A-A-ND - BOARD DELTA SIGMA ADC LTC2492 |
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LTC2492
15
2492fd
APPLICATIONS INFORMATION
Easy Drive Input Current Cancellation
The LTC2492 combines a high precision delta-sigma ADC
with an automatic, differential, input current cancellation
front end. A proprietary front-end passive sampling network
transparently removes the differential input current. This
enables external RC networks and high impedance sen-
sors to directly interface to the LTC2492 without external
ampliers. The remaining common mode input current
is eliminated by either balancing the differential input
impedances or setting the common mode input equal to
the common mode reference (see Automatic Differential
Input Current Cancellation Section). This unique architec-
ture does not require on-chip buffers, thereby enabling
signals to swing beyond ground and VCC. Moreover, the
cancellation does not interfere with the transparent offset
and full-scale auto-calibration and the absolute accuracy
(full scale + offset + linearity + drift) is maintained even
with external RC networks.
Power-Up Sequence
The LTC2492 automatically enters an internal reset state
when the power supply voltage VCC drops below ap-
proximately 2V. This feature guarantees the integrity of
the conversion result, input channel selection and serial
clock mode.
When VCC rises above this threshold, the converter creates
an internal power-on-reset (POR) signal with a duration
of approximately 4ms. The POR signal clears all internal
registers. The conversion immediately following a POR
cycle is performed on the input channel IN+ = CH0, IN– =
CH1, simultaneous 50Hz/60Hz rejection and 1
× output
rate. The rst conversion following a POR cycle is accurate
within the specication of the device if the power supply
voltage is restored to (2.7V to 5.5V) before the end of the
POR interval. A new input channel, rejection mode, speed
mode, or temperature selection can be programmed into
the device during this rst data input/output cycle.
Reference Voltage Range
This converter accepts a truly differential external reference
voltage. The absolute/common mode voltage range for
REF+ and REF– pins covers the entire operating range of
the device (GND to VCC). For correct converter operation,
VREF must be positive (REF+ > REF–).
The LTC2492 differential reference input range is 0.1V to
VCC.Forthesimplestoperation,REF+canbeshortedtoVCC
and REF– can be shorted to GND. The converter output noise
is determined by the thermal noise of the front-end circuits,
and as such, its value in nanovolts is nearly constant with
reference voltage. A decrease in reference voltage will not
signicantly improve the converter’s effective resolution.
On the other hand, a decreased reference will improve the
converter’s overall INL performance.
Input Voltage Range
The analog inputs are truly differential with an absolute,
common mode range for the CH0 to CH3 and COM input
pins extending from GND – 0.3V to VCC + 0.3V. Outside
these limits, the ESD protection devices begin to turn
on and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2492 converts the
bipolar differential input signal VIN = IN+ – IN– (where
IN+ and IN– are the selected input channels), from –FS =
–0.5 VREF to +FS = 0.5 VREF where VREF = REF+ – REF –.
Outside this range, the converter indicates the overrange
or the underrange condition using distinct output codes
(see Table 1).
Signals applied to the input (CH0 to CH3, COM) may
extend 300mV below ground and above VCC. In order to
limit any fault current, resistors of up to 5k may be added
in series with the input. The effect of series resistance on
the converter accuracy can be evaluated from the curves
presented in the Input Current/Reference Current sections.
In addition, series resistors will introduce a temperature
dependent error due to input leakage current. A 1nA
input leakage current will develop a 1ppm offset error
on a 5k resistor if VREF = 5V. This error has a very strong
temperature dependency.
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