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参数资料
| 型号： | LTC263ACSC6-LZ12#TRPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 4.4 us SETTLING TIME, 12-BIT DAC, PDSO6 |
| 封装： | LEAD FREE, PLASTIC, MO-203AB, SC-70, 6 PIN |
| 文件页数： | 7/20页 |
| 文件大小： | 341K |
| 代理商： | LTC263ACSC6-LZ12#TRPBF |
LTC2630
15
2630f
Reference Modes
For applications where an accurate external reference is
not available, the LTC2630 has a user-selectable, integrated
reference. The LTC2630-LM and LTC2630-LZ provide a
full-scale output of 2.5V. The LTC2630-HM and LTC2630-
HZ provide a full-scale output of 4.096V.
The internal reference can be useful in applications where
the supply voltage is poorly regulated. Internal Reference
mode can be selected by using command 0110, and is
the power-on default.
The DAC can also operate in supply as reference mode us-
ing command 0111. In this mode, VCC supplies the DAC’s
reference voltage and the supply current is reduced.
Voltage Output
The LTC2630’s integrated rail-to-rail amplier has guaran-
teed load regulation when sourcing or sinking up to 10mA
at 5V, and 5mA at 3V.
Load regulation is a measure of the amplier’s ability to
maintain the rated voltage accuracy over a wide range of
load current. The measured change in output voltage per
change in forced load current is expressed in LSB/mA.
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in
units from LSB/mA to ohms. The amplier’s DC output
impedance is 0.1
Ω when driving a load well away from
the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by
the 50
Ω typical channel resistance of the output devices
(e.g., when sinking 1mA, the minimum output voltage is
50
Ω 1mA, or 50mV). See the graph “Headroom at Rails
vs. Output Current” in the Typical Performance Charac-
teristics section.
The amplier is stable driving capacitive loads of up to
500pF.
Rail-to-Rail Output Considerations
In any rail-to-rail voltage output device, the output is
limited to voltages within the supply range.
Since the analog output of the DAC cannot go below ground,
it may limit for the lowest codes as shown in Figure 4b.
Similarly, limiting can occur near full scale when using the
supply as reference. If VFS = VCC and the DAC full-scale
error (FSE) is positive, the output for the highest codes
limits at VCC, as shown in Figure 4. No full-scale limiting
can occur if VFS is less than VCC–FSE.
Offset and linearity are dened and tested over the region
of the DAC transfer function where no output limiting can
occur.
Board Layout
The PC board should have separate areas for the analog and
digital sections of the circuit. A single, solid ground plane
should be used, with analog and digital signals carefully
routed over separate areas of the plane. This keeps digital
signals away from sensitive analog signals and minimizes
the interaction between digital ground currents and the
analog section of the ground plane. The resistance from
the LTC2630 GND pin to the ground plane should be as
low as possible. Resistance here will add directly to the
effective DC output impedance of the device (typically
0.1
Ω). Note that the LTC2630 is no more susceptible to
this effect than any other parts of this type; on the con-
trary, it allows layout-based performance improvements
to shine rather than limiting attainable performance with
excessive internal resistance.
Another technique for minimizing errors is to use a sepa-
rate power ground return trace on another board layer.
The trace should run between the point where the power
supply is connected to the board and the DAC ground pin.
Thus the DAC ground pin becomes the common point for
analog ground, digital ground, and power ground. When
the LTC2630 is sinking large currents, this current ows
out the ground pin and directly to the power ground trace
without affecting the analog ground plane voltage.
It is sometimes necessary to interrupt the ground plane
to conne digital ground currents to the digital portion of
the plane. When doing this, make the gap in the plane only
as long as it needs to be to serve its purpose and ensure
that no traces cross over the gap.
OPERATION
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