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参数资料
| 型号： | LTC2755BCUP-16#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT CUR OUT 64-QFN |
| 标准包装： | 2,000 |
| 系列： | SoftSpan™ |
| 设置时间： | 2µs |
| 位数： | 16 |
| 数据接口： | 并联 |
| 转换器数目： | 4 |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-WFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（9x9） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 8 电流，单极；8 电流，双极 |
| 采样率（每秒）： | * |
| 配用： | DC1112A-ND - BOARD DAC LTC2755-16 |
LTC2755
11
2755f
PIN FUNCTIONS
READ (Pin 49): Read Pin. When READ is asserted high,
the data I/O (D0-D15) or span I/O (S0-S2) port outputs the
contents of the selected register (see Table 1). For single-
span operation, readback of the span I/O pins is disabled,
since they must be tied directly to GND and/or VDD.
UPD (Pin 50): Update and Buffer Select Pin. When UPD
is asserted high with READ held low, the contents of the
addressed DAC’s input registers (both data and span) are
copied into their respective DAC registers. The output of the
DAC is updated, reecting the new DAC register values.
When READ is held high (during a read operation), the
update function is disabled and the UPD pin functions as
a buffer selector—logic low to read back the input register,
high to read back the DAC register. See Readback in the
Operation section.
WR (Pin 51): Active Low Write Pin. A Write operation cop-
ies the data present on the data or span I/O pins (D0-D15
or S0-S2, respectively) into the associated input register.
When READ is high, the Write function is disabled.
S1 (Pin 52): Span I/O Bit 1. Pins S0, S1 and S2 are used to
program and to read back the output ranges of the DACs.
REFB (Pin 53): Reference Input for DAC B. The imped-
ance looking into this pin is 10k to ground. For normal
operation tie this pin to the negative reference voltage at
the output of reference inverting amplier A1 (see Typical
Applications). Typically –5V; accepts up to ±15V.
ROFSB (Pin 54): Bipolar Offset Network for DAC B. This
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at RIN1 (Pin 64). The
impedance looking into this pin is 20k to ground.
RFBB (Pin 55): DAC B Feedback Resistor. For normal
operation tie to the output of the I/V converter amplier
for DAC B (see Typical Applications). The DAC output
current from IOUT1B ows through the feedback resistor
to the RFBB pin. The impedance looking into this pin is
10k to ground.
IOUT1B (Pin 56): DAC B Current Output. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplier for DAC B (see Typical Applications).
RVOSB (Pin 57): DAC B Offset Adjust. Nominal input range
is ±5V. The impedance looking into this pin is 1M to ground.
If not used, tie RVOSB to ground.
RVOSA (Pin 58): DAC A Offset Adjust. Nominal input range
is ±5V. The impedance looking into this pin is 1M to ground.
If not used, tie RVOSA to ground.
IOUT1A (Pin 59): DAC A Current Output. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplier for DAC A (see Typical Applications).
RFBA (Pin 60): DAC A Feedback Resistor. For normal
operation tie to the output of the I/V converter amplier
for DAC A (see Typical Applications). The DAC output
current from IOUT1A ows through the feedback resistor
to the RFBA pin. The impedance looking into this pin is
10k to ground.
ROFSA (Pin 61): Bipolar Offset Network for DAC A. This
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at RIN1 (Pin 64). The
impedance looking into this pin is 20k to ground.
REFA (Pin 62): Reference Input for DAC A, and connec-
tion for internal reference inverting resistor R2. The 20k
resistor R2 is connected internally from RCOM1 to REFA.
For normal operation tie this pin to the output of reference
inverting amplier A1 (see Typical Applications). Typically
–5V; accepts up to ±15V. The impedance looking into this
pin is 10k to ground (RIN1 and RCOM1 oating).
RCOM1 (Pin 63): Center Tap Point for Reference Ampli-
er A1 Inverting Resistors. The 20k reference inverting
resistors R1 and R2 are connected internally from RIN1
to RCOM1 and from RCOM1 to REFA, respectively (see
Block Diagram). For normal operation tie RCOM1 to the
negative input of external reference inverting amplier A1
(see Typical Applications).
RIN1 (Pin 64): Input Resistor R1 for Reference Inverting
Amplier A1. The 20k resistor R1 is connected internally
from RIN1 to RCOM1. For normal operation tie RIN1 to
the external reference voltage VREF1 (see Typical Applica-
tions). Typically 5V; accepts up to ±15V.
Exposed Pad (Pin 65): Ground. The Exposed Pad must
be soldered to the PCB.
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