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参数资料
| 型号： | LTC2919HDDB-2.5#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO10 |
| 封装： | 3 X 2 MM, LEAD FREE, PLASTIC, MO-229WECD-1, DFN-10 |
| 文件页数： | 3/16页 |
| 文件大小： | 195K |
| 代理商： | LTC2919HDDB-2.5#PBF |
LTC2919
11
2919f
APPLICATIO S I FOR ATIO
WU
U
4.425V ±75mV over temperature (i.e., 10% to 13% below
5V). The monitored system must thus operate reliably
down to 4.35V or 13% below 5V over temperature.
The above discussion is concerned only with the DC value
of the monitored supply. Real supplies also have relatively
high frequency variations from sources such as load
transients, noise and pickup.
The LTC2919 uses two techniques to combat spurious
outputs toggling from high frequency variation. First,
the timeout period helps prevent high frequency varia-
tion whose frequency is above 1/ tRST from appearing at
the RST output. Second, the propagation delay versus
overdrive function lters short glitches before the OUT1,
OUT2 toggling or RST pulling low.
When an ADJ becomes invalid, the corresponding OUT
and RST pin assert low. When the supply recovers past
the valid threshold, the reset timer starts (assuming it is
not disabled) and RST does not go high until it nishes.
If the supply becomes invalid any time during the timeout
period, the timer resets and starts fresh when the supply
next becomes valid.
To reduce sensitivity of short glitches from toggling the
output pins, the comparator outputs go through a lowpass
lter before triggering the output logic. Any transient at the
input of a comparator needs to be of sufcient magnitude
and duration to pass the lter before it can change the
monitor state.
The combination of the reset timeout and comparator
ltering prevents spurious changes in the output state
without sacricing threshold accuracy. If further supply
glitch immunity is needed, the user may place an external
capacitor from the ADJ input to ground. The resultant RC
lowpass lter with the resistor divider will further reject
high frequency components of the supply, at the cost of
slowing the monitor’s response to fault conditions.
A common solution to the problem of spurious reset is
to introduce hysteresis around the nominal threshold.
However, this hysteresis degrades the effective accuracy
of the monitor and increases the range over which the
system must operate. The LTC2919 therefore does not
have hysteresis, except in comparator mode (by tying
TMR pin to VCC). If hysteresis is desired in other modes,
it may be added externally. See 48V Telecom UV/OV with
Hysteresis Applications on page 14 for an example.
Selecting External Resistors
In a typical positive supply monitoring application, the
ADJx pin connects to a tap point on an external resistive
divider between a positive voltage being monitored and
ground, as shown in Figure 1.
When monitoring a negative supply, the ADJx pin connects
to a tap point on a resistive divider between the negative
voltage being monitored and the buffered reference (REF),
as shown in Figure 2.
–
+
–
0.5V
2919 F01
ADJx
VMON
RP2
RP1
–
+
–
0.5V
2919 F02
ADJx
REF
VMON
RN1
RN2
Figure 1. Setting Positive Supply Trip Point
Figure 2. Setting Negative Supply Trip Point
Normally the user will select a desired trip voltage based
on their supply and acceptable tolerances, and a value of
RN1 or RP1 based on current draw. Current used by the
resistive divider will be approximately:
I =
0.5V
R
P1
.OR =
0.5V
R
N1
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