参数资料
型号: LTC3208EUH#TRPBF
厂商: Linear Technology
文件页数: 7/24页
文件大小: 0K
描述: IC LED DRIVR QVGA DISPLAY 32-QFN
标准包装: 2,500
拓扑: 升压(升压),切换式电容器(充电泵)
输出数: 17
内部驱动器:
类型 - 主要: 背光
类型 - 次要: RGB,白色 LED
频率: 600kHz ~ 1.2MHz
电源电压: 2.9 V ~ 4.5 V
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-QFN
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
LTC3208
PI FU CTIO S
CAM1-4 (Pins 1, 2, 3, 4): Current Source Outputs for
the CAM Display White LEDs. The LEDs on the CAM
display can be set from 0mA to 102mA in 16 steps via
software control and internal 4-bit linear DAC. Two 4-bit
registers are available. One is used to program the high
camera current and the second the low camera current.
These registers can be selected via the serial port or the
CAMHL pin. Each output can be disabled by connecting
the output to CPO. Setting data in REGF to 0 disables all
CAM outputs. (See Applications Information.)
AUX1-4 (Pins 5, 6, 7, 8): Current Source Outputs for the
AUX Display White LEDs. When used as a separate display,
the LED current sources of the AUX display can be set
from 0mA to 26mA in 16 steps via software control and
internal 4-bit linear DAC. In addition, these outputs can
be connected individually as needed to the CAM, SUB or
MAIN displays and driven from each display’s associated
DAC. AUX 1, 2 and 3 can be disabled by connecting the
output to CPO. AUX 4 can be used as an open drain I 2 C
controlled logic output but cannot be disabled by con-
necting to CPO when con?gured as logic output. Setting
data in REGE and REGB2 to 0 disables all AUX outputs.
(See Applications Information.)
CAMHL (Pin 9): Logic Input. Selects CAM high register
when asserted High and CAM Low Register when low.
The high to low transition automatically resets the charge
pump mode to 1x.
SCL (Pin 10): I 2 C Clock Input. The logic level for SCL is
referenced to DV CC .
SDA (Pin 11): I 2 C Data Input for the Serial Port. Serial
data is shifted in one bit per clock to control the LTC3208.
V BAT3, 2, 1 (Pins 12, 24, 30): Supply Voltage for the Entire
Device. Three separate pins are used to isolate the charge
pump from the analog sections to reduce noise. All pins
must be connected together externally and bypassed with
a 4.7μF low ESR ceramic capacitor. The 4.7μF bypass
capacitor should be connected close to V BAT2 . A 0.1μF
capacitor should be connected close to V BAT3 .
R REF (Pin 13): Controls the Maximum Amount of LED
Current for all Displays. The R REF voltage is 1.215V. An
external resistor to ground sets the reference currents for
all display DACs and support circuits. Since this resistor
biases all circuits within the LTC3208, the value is limited
to a range of 22k to 30k.
DV CC (Pin 14): Supply Voltage for all Digital I/O Lines.
This pin sets the logic reference level of the LTC3208.
A UVLO circuit on the DV CC pin forces all registers to all
0s whenever DV CC is below the DV CC UVLO threshold.
Bypass to GND with a 0.1μF capacitor.
MAIN1-4 (Pins 15,16,17,18): Current Source Outputs
for the MAIN Display White LEDs. The LEDs on the MAIN
display can be set from 0μA to 27.5mA in 256 steps via
software control and internal 8-bit linear DAC. Each output
can be disabled externally by connecting the output to CPO.
Setting data in REGC to 0 disables all MAIN outputs.
SUB2, SUB1 (Pins 19, 20): Current Source Outputs for
the SUB Display White LEDs. The LEDs on the SUB display
can be set from 0μA to 27.5mA in 256 steps via software
control and an internal 8-bit linear DAC. Each output can
be disabled externally by connecting the output to CPO.
Setting the data in REGD to 0 disables all SUB outputs.
The logic level is referenced to DV CC .
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