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参数资料
| 型号： | LTC3220IPF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | IC LED DRVR QVGA DISPLAY 28UTQFN |
| 标准包装： | 91 |
| 拓扑： | 开路漏极，升压（升压），切换式电容器（充电泵） |
| 输出数： | 18 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光 |
| 类型 - 次要： | LED 闪烁器 |
| 频率： | 850kHz ~ 1.05MHz |
| 电源电压： | 2.9 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-UFQFN 裸露焊盘 |
| 供应商设备封装： | 28-UTQFN（4x4）裸露焊盘 |
| 包装： | 管件 |
| 工作温度： | -40°C ~ 125°C |
LTC3220/LTC3220-1
ELECTRICAL CHARACTERISTICS The l denotes the speci?cations which apply over the full operating
temperature range, otherwise speci?cations are at T A = 25°C. V IN = 3.6V, DV CC = 3V, RST = high, C1 = C2 = C3 = 2.2μF, C4 = 4.7μF,
unless otherwise noted.
SYMBOL
PARAMETER
V IN Shutdown Current
CONDITIONS
l
MIN
TYP
3.2
MAX
7
UNITS
μA
DV CC Shutdown Current
l
1
μA
Universal LED Current, 6-Bit Linear DACs, ULED = 1V
Full-Scale LED Current
l
18
20
22
mA
Minimum (I LSB ) LED Current Step
0.314
mA
Minimum Programmable Current
ULED Data Register Programmed to
0.395
mA
0b00000001
LED Current Matching
LED Dropout Voltage
Blink Rate Period
ULED Up/Down Gradation Ramp Times
Any Two Outputs, 50% of FS
I LED = FS
REG19, D4 = 0
REG19, D4 = 1
REG19, D1 = 1, D2 = 0
REG19, D1 = 0, D2 = 1
REG19, D1 = 1, D2 = 1
1.5
120
1.25
2.5
0.24
0.48
0.96
%
mV
Sec
Sec
Sec
Sec
Sec
Gradation Period
V OL General Purpose Output Mode (GPO)
LED Turn-On Delay
REG19, D1 = 1, D2 = 0
REG19, D1 = 0, D2 = 1
REG19, D1 = 1, D2 = 1
I OUT = 1mA, Single Output Enabled
From Stop Bit, Part Enabled
0.313
0.625
1.25
5
4
0.410
0.820
1.640
Sec
Sec
Sec
mV
μs
Charge Pump (CPO)
1x Mode Output Impedance
0.6
Ω
1.5x Mode Output Impedance
2x Mode Output Impedance
CPO Regulation Voltage
V IN = 3V, V CPO = 4.2V (Note 5)
V IN = 3V, V CPO = 4.8V (Note 5)
1.5x Mode, I CPO = 20mA
2x Mode, I CPO = 20mA
3.6
4.1
4.5
5.03
Ω
Ω
V
V
Clock Frequency
l
0.65
0.85
1.05
MHz
CPO Short-Circui t Detection
Threshold Voltage
l
0.4
1.3
V
Test Current
CPO = 0V
l
10
30
mA
SDA, SCL, RST
V IL
V IH
l
l
0.7 ? DV CC
0.3 ? DV CC
V
V
I IH
I IL
SDA, SCL, RST = DV CC
SDA, SCL, RST = 0V
l
l
–1
–1
1
1
μA
μA
V OL
Digital Output Low (SDA)
I PULLUP = 3mA
l
0.12
0.4
V
RST Timing Reset Pulse Duration
Serial Port Timin g (Notes 6, 7)
20
ns
f SCL
t BUF
Clock Operating Frequency
Bus Free Time Between Stop and Start
1.3
400
kHz
μs
Condition
t HD,STA
t SU,STA
t SU,STO
Hold Time After (Repeated) Start Condition
Repeated Start Condition Setup Time
Stop Condition Setup Time
0.6
0.6
0.6
μs
μs
μs
32201fc
3
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