参数资料
型号: LTC3406BES5-1.2#TRPBF
厂商: Linear Technology
文件页数: 8/12页
文件大小: 0K
描述: IC REG BUCK SYNC 1.2V TSOT23-5
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 1.2V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1.5MHz
电流 - 输出: 600mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
包装: 带卷 (TR)
供应商设备封装: TSOT-23-5
LTC3406B-1.2
APPLICATIO S I FOR ATIO
Typically, once the ESR requirement for C OUT has been
met, the RMS current rating generally far exceeds the
I RIPPLE(P-P) requirement. The output ripple ? V OUT is deter-
mined by:
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
? V OUT L ? ESR +
? ? I
8 fC OUT ?
?
?
1 ?
?
Efficiency Considerations
The efficiency of a switching regulator is equal to the
where f = operating frequency, C OUT = output capacitance
and ? I L = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ? I L increases with input voltage.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the case
of tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3406B-1.2’s control loop does not depend on the
output capacitor’s ESR for stable operation, ceramic ca-
pacitors can be used freely to achieve very low output
ripple and small circuit size.
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3406B-1.2 circuits: V IN quiescent current
and I 2 R losses. The V IN quiescent current loss dominates
the efficiency loss at very low load currents whereas the
I 2 R loss dominates the efficiency loss at medium to high
load currents. In a typical efficiency plot, the efficiency
curve at very low load currents can be misleading since the
actual power lost is of no consequence as illustrated in
Figure 2.
1
0.1
0.01
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, V IN . At best, this ringing can
0.001
0.0001
0.1
1
V IN = 2.7V
V IN = 3.6V
V IN = 4.2V
10 100 1000
LOAD CURRENT (mA)
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
3406B12 F02
Figure 2. Power Loss vs Load Current
can potentially cause a voltage spike at V IN , large enough
to damage the part.
sn3406b12 3406b12fs
8
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