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| 型号： | LTC3406BES5-1.2#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1.2V TSOT23-5 |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1.2V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.5MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | TSOT-23-5 |
LTC3406B-1.2
APPLICATIO S I FOR ATIO
1. The V IN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from V IN to ground. The resulting
dQ/dt is the current out of V IN that is typically larger than
the DC bias current. In continuous mode, I GATECHG =
f(Q T + Q B ) where Q T and Q B are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to V IN and thus
their effects will be more pronounced at higher supply
voltages.
2. I 2 R losses are calculated from the resistances of the
internal switches, R SW , and external inductor R L . In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R DS(ON) and the duty cycle
(DC) as follows:
R SW = (R DS(ON)TOP )(DC) + (R DS(ON)BOT )(1 – DC) (2)
The R DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I 2 R losses, simply add R SW to
R L and multiply the result by the square of the average
output current.
Other losses including C IN and C OUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3406B-1.2 does not dissi-
pate much heat due to its high efficiency. But, in applica-
tions where the LTC3406B-1.2 is running at high ambient
temperature with low supply voltage, the heat dissipated
may exceed the maximum junction temperature of the
part. If the junction temperature reaches approximately
150 ° C, both power switches will be turned off and the SW
node will become high impedance.
To avoid the LTC3406B-1.2 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T R = (P D )( θ JA )
where P D is the power dissipated by the regulator and θ JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T J , is given by:
T J = T A + T R
where T A is the ambient temperature.
As an example, consider the LTC3406B-1.2 with an input
voltage of 2.7V, a load current of 600mA and an ambient
temperature of 70 ° C. From the typical performance graph
of switch resistance, the R DS(ON) at 70 ° C is approximately
0.52 ? for the P-channel switch and 0.42 ? for the
N-channel switch. Using equation (2) to find the series
resistance looking into the SW pin gives:
R SW = 0.52 ? (0.44) + 0.42 ? (0.56) = 0.46 ?
Therefore, power dissipated by the part is:
P D = I LOAD2 ? R SW = 165.6mW
For the SOT-23 package, the θ JA is 250 ° C/ W. Thus, the
junction temperature of the regulator is:
T J = 70 ° C + (0.1656)(250) = 111.4 ° C
which is below the maximum junction temperature of
125 ° C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (R SW ).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V OUT immediately shifts by an amount
equal to ( ? I LOAD ? ESR), where ESR is the effective series
resistance of C OUT . ? I LOAD also begins to charge or
discharge C OUT , which generates a feedback error signal.
sn3406b12 3406b12fs
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| LTC3406ES5#TR | 功能描述:IC REG BUCK SYNC ADJ TSOT23-5 RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
| LTC3406ES5#TRM | 功能描述:IC REG BUCK SYNC ADJ TSOT23-5 RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
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