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| 型号： | LTC3414EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 20TSSOP |
| 标准包装： | 74 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.25 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 20-TSSOP-EP |
| 产品目录页面： | 1334 (CN2011-ZH PDF) |
LTC3414
APPLICATIO S I FOR ATIO
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is less than V IN by 1V,
Burst Mode operation is enabled. During Burst Mode
Operation, the voltage on the SYNC/MODE pin determines
the burst clamp level, which sets the minimum peak
inductor current, I BURST , for each switching cycle accord-
ing to the following equation:
Frequency Synchronization
The LTC3414’s internal oscillator can be synchronized to
an external clock signal. During synchronization, the top
MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 4MHz. Synchronization only occurs if
the external frequency is greater than the frequency set
(
I BURST = ? ? V BURST – 0 . 383 V
? 6 . 9 A ?
? 0 . 6 V ?
)
by the external resistor. Because slope compensation is
generated by the oscillator’s RC circuit, the external
frequency should be set 25% higher than the frequency
t SS = R SS C SS ln ? ? ( SECONDS )
V BURST isthevoltageontheSYNC/MODEpin.I BURST can
only be programmed in the range of 0A to 7A. For values
of V BURST greater than 1V, I BURST is set at 7A. For values
of V BURST less than 0.4V, I BURST is set at 0A. As the output
load current drops, the peak inductor currents decrease to
keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I BURST , the burst clamp will force the peak inductor
current to remain equal to I BURST regardless of further
reductions in the load current. Since the average inductor
current is greater than the output load current, the voltage
on the I TH pin will decrease. When the I TH voltage drops
to 150mV, sleep mode is enabled in which both power
MOSFETs are shut off along with most of the circuitry to
minimize power consumption. All circuitry is turned back
on and the power MOSFETs begin switching again when
the output voltage drops out of regulation. The value for
I BURST is determined by the desired amount of output
voltage ripple. As the value of I BURST increases, the sleep
period between pulses and the output voltage ripple in-
crease. The burst clamp voltage, V BURST , can be set by a
resistor divider from the V FB pin to the SGND pin as shown
in Figure 1.
Pulse skipping, which is a compromise between low
output voltage ripple and efficiency, can be implemented
by connecting pin SYNC/MODEto ground. This sets I BURST
to 0A. In this condition, the peak inductor current is limited
by the minimum on-time of the current comparator. The
lowest output voltage ripple is achieved while still operat-
ing discontinuously. During very light output loads, pulse
skipping allows only a few switching cycles to be skipped
while maintaining the output voltage in regulation.
set by the external resistor to ensure that adequate slope
compensation is present.
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3414 as well as a timer for soft-start. Pulling the
RUN/SS pin below 0.5V places the LTC3414 in a low
quiescent current shutdown state (I Q < 1 μ A).
The LTC3414 contains an internal soft-start clamp that
gradually raises the clamp on I TH after the RUN/SS pin is
pulled above 2V. The full current range becomes available
on I TH after 1024 switching cycles. If a longer soft-start
period is desired, the clamp on I TH can be set externally
with a resistor and capacitor on the RUN/SS pin as shown
in Figure 1. The soft-start duration can be calculated by
using the following formula:
? V IN ?
? V IN – 1 . 8 V ?
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: V IN quiescent current and I 2 R losses.
3414fb
10
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| LTC3414IFE#PBF | 功能描述:IC REG BUCK SYNC ADJ 4A 20TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
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