参数资料
型号: LTC3414MPFE#PBF
厂商: Linear Technology
文件页数: 12/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A 20TSSOP
标准包装: 76
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1MHz
电流 - 输出: 4A
同步整流器:
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)裸露焊盘
包装: 管件
供应商设备封装: 20-TSSOP-EP
LTC3414
APPLICATIO S I FOR ATIO
Design Example
As a design example, consider using the LTC3414 in an
application with the following specifications:
If we set the sum of R2 and R3 to 200k, then the following
equations can be solved:
R 2 + R 3 = 200 k
1 + =
V IN = 2.7V to 4.2V, V OUT = 2.5V, I OUT(MAX) = 4A,
I OUT(MIN) = 100mA, f = 1MHz.
R2
R 3
0 . 8 V
0 . 49 V
Because efficiency is important at both high and low load
current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
The two equations shown above result in the following
values for R2 and R3: R2 = 78.7k , R3 = 124k. The value
of R1 can now be determined by solving the following
R OSC =
– 10 k = 298 k
1 +
3.08?10 11
1 ? 10 6
Use a standard value of 294k. Next, calculate the inductor
value for about 40% ripple current at maximum V IN :
equation.
R 1
202 . 7 k
R 1 = 432 k
=
2.5V
0 . 8 V
? ? ? 1 – 4 . 2 V ? ? = 0 . 63 μ H
L = ?
?      2.5V     ??    2.5V?
? ( 1 MHz )( 1 . 6 A ) ?
Using a 0.47 μ H inductor results in a maximum ripple
A value of 432k will be selected for R1. Figure 4 shows the
complete schematic for this design example.
PC Board Layout Checklist
Δ I L = ?
? = 2 . 15 A
current of:
? 2 . 5 V ? ?
??
? ( 1 MHz )( 0 . 47 μ H ) ? ? 1 –
2 . 5 V ?
4 . 2 V ?
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3414. Check the following in your layout:
C OUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
22 μ F ceramic capacitor and a 470 μ F tantalum capacitor
will be used.
C IN should be sized for a maximum current rating of:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small signal components returning to
the SGND pin at one point which is then connected to the
PGND pin close to the LTC3414.
2. Connect the (+) terminal of the input capacitor(s), C IN ,
I RMS = ( 4 A ) ?
?
?2.5V? 4.2V
? 4 . 2 V ? 2 . 5 V
– 1 = 1 . 96 A RMS
as close as possible to the PV IN pin. This capacitor
provides the AC current into the internal power MOSFETs.
(
)
? 6 . 9 A ?
? = 1 . 23 A
I BURST BURST – 0 . 383 V ?
DecouplingthePV IN andSV IN pinswithtwo22μFcapaci-
tors and a 330 μ F tantalum capacitor is adequate for most
applications.
The burst clamp and output voltage can now be pro-
grammed by choosing the values of R1, R2, and R3. The
voltage on pin MODE will be set to 0.49V by the resistor
divider consisting of R2 and R3. A burst clamp voltage of
0.49V will set the minimum inductor current, I BURST , as
follows:
= V
? 0 . 6 V ?
3. Keep the switching node, SW, away from all sensitive
small signal nodes.
4. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise of
power components. You can connect the copper areas to
any DC net (PV IN , SV IN , V OUT , PGND, SGND, or any other
DC rail in your system).
5. Connect the V FB pin directly to the feedback resistors.
The resistor divider must be connected between V OUT
and SGND.
3414fb
12
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