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参数资料
| 型号： | LTC3521IFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BST SYNC ADJ 20TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 3 |
| 输出电压： | 0.6 V ~ 5.5 V，1.8 V ~ 5.25 V |
| 输入电压： | 1.8 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 1.1MHz |
| 电流 - 输出： | 600mA，1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-TSSOP-EP |
LTC3521
OPERATION
PV OUT
–
modes. These advantages result in increased efficiency
and stability in comparison to the traditional 4-switch
buck-boost converter.
Error Amplifier and Compensation
The buck-boost converter utilizes a voltage mode error
amplifier with an internal compensation network as shown
in Figure 2.
LTC3521
V OUT
+ 0.6V R2
FB1
R1
GND
3521 F02
Figure 2. Buck-Boost Error Amplifier and Compensation
Notice that resistor R2 of the external resistor divider
network plays an integral role in determining the frequency
response of the compensation network. The ratio of R2 to
R1 must be set to program the desired output voltage but
this still allows the value of R2 to be adjusted to optimize
the transient response of the converter. Increasing the value
of R2 generally leads to greater stability at the expense of
reduced transient response speed. Increasing the value of
R2 can yield substantial transient response improvement in
cases where the phase margin has been reduced due to the
use of a small value output capacitor or a large inductance
(particularly with large boost step-up ratios). Conversely,
decreasing the value of R2 increases the loop bandwidth
which can improve the speed of the converter’s transient
response. This can be useful in improving the transient
response if a large valued output capacitor is utilized. In
this case, the increased bandwidth created by decreasing
R2 is used to counteract the reduced converter bandwidth
caused by the large output capacitor.
Current Limit Operation
The buck-boost converter has two current limit circuits.
The primary current limit is an average current limit circuit
which injects an amount of current into the feedback node
which is proportional to the extent that the switch A cur-
rent exceeds the current limit value. Due to the high gain
of this loop, the injected current forces the error amplifier
output to decrease until the average current through switch
A decreases approximately to the current limit value. The
average current limit utilizes the error amplifier in an active
state and thereby provides a smooth recovery with little
overshoot once the current limit fault condition is removed.
Since the current limit is based on the average current
through switch A, the peak inductor current in current
limit will have a dependency on the duty cycle (i.e., on the
input and output voltages in the overcurrent condition).
The speed of the average current limit circuit is limited by
the dynamics of the error amplifier. On a hard output short,
it would be possible for the inductor current to increase
substantially beyond current limit before the average cur-
rent limit circuit would react. For this reason, there is a
second current limit circuit which turns off switch A if the
current ever exceeds approximately 165% of the average
current limit value. This provides additional protection in
the case of an instantaneous hard output short.
Reverse Current Limit
The reverse current comparator on switch D monitors
the inductor current entering PV OUT . When this current
exceeds 375mA (typical), switch D will be turned off for
the remainder of the switching cycle.
12
For more information www.linear.com/LTC3521
3521fb
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