参数资料
型号: LTC3542ES6#TRPBF
厂商: Linear Technology
文件页数: 3/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ TSOT23-6
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.5 V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 2.25MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-6 细型,TSOT-23-6
包装: 带卷 (TR)
供应商设备封装: TSOT-23-6
LTC3542
ELECTRICAL CHARACTERISTICS The ● denotes the speci?cations which apply over the full operating
temperature range, otherwise speci?cations are at T A = 25°C. V IN = 3.6V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I S
Input DC Supply Current (Note 5)
Active Mode
V FB = 0.5V
500
μA
Sleep Mode
Shutdown
V FB = 0.7V, MODE = 0V
RUN = 0V
26
0.1
35
1
μA
μA
f OSC
Oscillator Frequency
V FB = 0.6V
1.8
2.25
2.7
MHz
f SYNC
I LIM
Synchronous Frequency
Peak Switch Current
V FB = 0.6V
V IN = 3V, V FB = 0.5V, Duty Cycle < 35%
1
650
1000
3
MHz
mA
R DS(ON)
I SW(LKG)
V UVLO
V RUN
I RUN
V MODE/SYNC
I MODE/SYNC
P-Channel On Resistance (Note 6)
N-Channel On Resistance (Note 6)
Switch Leakage Current
Undervoltage Lockout Threshold
RUN Threshold
RUN Leakage Current
MODE/SYNC Threshold
MODE/SYNC Leakage Current
I SW = 100mA
I SW = –100mA
V IN = 5V, V RUN = 0V, V SW = 0V or 5V
V IN Rising
V IN Falling
1.8
0.3
0.3
0.5
0.35
±0.01
2.0
1.9
±0.01
±0.01
0.65
0.55
±1
2.3
1.5
±1
1.2
±1
Ω
Ω
μA
V
V
V
μA
V
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. No pin should exceed 6V.
Note 2: The LTC3542 is guaranteed to meet performance speci?cations
from 0°C to 85°C. Speci?cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3542I is guaranteed over the full
–40°C to 125°C operating temperature range.
Note 3: Failure to solder the Exposed Pad of the package to the PC board
will result in a thermal resistance much higher than 102°C/W.
Note 4: The converter is tested in a proprietary test mode that connects
the output of the error ampli?er to the SW pin, which is connected to an
external servo loop.
Note 5: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 6: The DFN switch on resistance is guaranteed by correlation to wafer
level measurements.
Note 7: T J is calculated from the ambient temperature T A and power
dissipation P D according to the following formula:
T J = T A + (P D ) ? ( θ JA ).
TYPICAL PERFORMANCE CHARACTERISTICS
T A = 25°C unless otherwise speci?ed.
SW
2V/DIV
V OUT
50mV/DIV
AC COUPLED
I L
100mA/DIV
Burst Mode Operation
SW
2V/DIV
V OUT
50mV/DIV
AC COUPLED
I L
100mA/DIV
Pulse Skip Mode Operation
RUN
2V/DIV
V OUT
1V/DIV
I L
100mA/DIV
Start-Up from Shutdown
V IN = 3.6V 2 μ s/DIV
V OUT = 1.8V
I LOAD = 25mA
FIGURE 3a CIRCUIT
3542 G01
V IN = 3.6V 400ns/DIV
V OUT = 1.8V
I LOAD = 25mA
FIGURE 3a CIRCUIT
3542 G02
V IN = 3.6V 400 μ s/DIV
V OUT = 1.8V
I LOAD = 0A
FIGURE 3a CIRCUIT
3542 G03
3542fa
3
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