参数资料
型号: LTC3542IDC#TRMPBF
厂商: Linear Technology
文件页数: 10/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.5A 6DFN
标准包装: 500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.5 V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 2.25MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 6-DFN-EP(2x2)
LTC3542
APPLICATIONS INFORMATION
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
Although all dissipative elements in the circuit produce
losses, three main sources usually account for most of
the losses in LTC3542 circuits: 1) V IN quiescent current,
2) I 2 R loss and 3) switching loss. V IN quiescent current
V OUT = 0 . 6 V ? 1 +
?
?
R2 ?
R 1 ? ?
loss dominates the power loss at very low load currents,
whereas the other two dominate at medium to high load
currents. In a typical ef?ciency plot, the ef?ciency curve
To improve the frequency response, a feed-forward capaci-
tor, C F , may also be used. Great care should be taken to
route the V FB line away from noise sources, such as the
inductor or the SW line.
Mode Selection and Frequency Synchronization
The MODE/SYNC pin is a multipurpose pin that provides
mode selection and frequency synchronization. Connect-
ing this pin to GND enables Burst Mode operation, which
provides the best low current ef?ciency at the cost of a
higher output voltage ripple. Connecting this pin to V IN
selects pulse skip mode operation, which provides the
lowest output ripple at the cost of low current ef?ciency.
The LTC3542 can also be synchronized to an external clock
signal with range from 1MHz to 3MHz by the MODE/SYNC
pin. During synchronization, the mode is set to pulse skip
and the top switch turn-on is synchronized to the falling
edge of the external clock.
Ef?ciency Considerations
The ef?ciency of a switching regulator is equal to the output
at very low load currents can be misleading since the
actual power loss is of no consequence as illustrated in
Figure 2.
1) The V IN quiescent current is the DC supply current given
in the Electrical Characteristics which excludes MOSFET
charging current. V IN current results in a small (<0.1%)
loss that increases with V IN , even at no load.
2) I 2 R losses are calculated from the DC resistances of
the internal switches, R SW , and external inductor, R L . In
continuous mode, the average output current ?ows through
inductor L, but is “chopped” between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
R DS(ON) and the duty cycle (D) as follows:
R SW = (R DS(ON)TOP )(D) + (R DS(ON)BOT )(1 – D)
The R DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I 2 R losses:
I 2 R losses = I OUT2 (R SW + R L )
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the ef?ciency and which change would produce
the most improvement. Ef?ciency can be expressed as:
Ef?ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
1000
100
10
1
0.1
V IN = 3.6V
Burst Mode OPERATION
V OUT = 2.5V
V OUT = 1.8V
V OUT = 1.2V
0.1
1
10 100
1000
OUTPUT CURRENT (mA)
3542 F02
Figure 2. Power Loss vs Load Current
3542fa
10
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