参数资料
型号: LTC3546EUFD#TRPBF
厂商: Linear Technology
文件页数: 9/30页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 1A/2A 28QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.6 V ~ 5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 2.25MHz,750kHz ~ 4MHz
电流 - 输出: 1A,2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 28-QFN(4x5)
LTC3546
PIN FUNCTIONS
(UFD/FE)
BMC2 (Pin 1/Pin 4): Burst Mode Clamp for Channel 2.
Connecting this pin to an external voltage between 0V and
0.6V sets the Burst Mode clamp level. If this pin is pulled
to V CCA , an internal Burst Mode clamp level is used. This
pin should be tied to GND when Burst Mode operation is
not selected.
TRACK/SS2 (Pin 2/Pin 5): Tracking input for Channel 2
output or optional external soft-start input. V OUT2 will track
an external voltage at this pin. Leaving this pin floating
allows V OUT2 to start-up using the internal soft-start. An
external soft-start can be programmed by connecting a
capacitor between this pin and ground. External soft-start
ramp time must be greater than the internal soft-start time
of 1.2ms. Refer to the Applications Information section
for more details.
V FB2 (Pin 3/Pin 6): Feedback voltage from external resis-
tive divider from the Channel 2 regulator output. Nominal
voltage for this pin is 0.6V.
I TH2 (Pin 4/Pin 7): Error Amplifier Compensation for Chan-
nel 2 Regulator. Peak current increases with an increase
in the voltage on this pin. Nominal voltage range for this
pin is 0V to 1.5V.
V CCD (Pin 5/Pin 8): Supply Pin for Internal Digital Cir-
cuitry.
RUN2 (Pin 6/Pin 9): Low Level Logic Input. Enable for
Channel 2. When pulled high, regulator is running. When
at 0V, regulator is off. When both RUN1 and RUN2 are at
0V the part is in shutdown.
V IN2 (Pin 7/Pin 10): Supply pin for 2A P-channel switch
which connects from V IN2 to SW2A/B.
V IN1 (Pin 8/Pin 11): Supply pin for 1A P-channel switch
which connects from V IN1 to SW1.
V IN1D (Pin 9/Pin 12): Supply pin for 1A dependent P-chan-
nel switch which connects from V IN1D to SW1D.
SW2A (Pin 10/Pin 13): Half of the switch node connec-
tion to the inductor for Channel 2. SW2A and SW2B must
be externally tied together. This pin swings from V IN2 to
PGND2.
SW2B (Pin 11/Pin 14): Half of the switch node connec-
tion to the inductor for Channel 2 SW2A and SW2B must
be externally tied together. This pin swings from V IN2 to
PGND2.
SW1D (Pin 12/Pin 15): The Dependent Switch Node
Connection. The pin is externally connected to SW1 for
a 2A/2A regulator or to SW2A/B for a 3A/1A regulator.
Internal circuitry detects which pin SW1D is externally
connected to, SW1 or SW2A/B. This pin swings from
V IN1D to PGND1D. SW1D switching will be controlled
by the output switch to which it is connected, i.e., SW1
or SW2A/SW2B. The dependant 1A power stage can be
disabled by floating the SW1D pin. The SW1D pin must
never be connected to V IN or GND. When disabled, SW1D
is pulled high internally.
SW1 (Pin 13/Pin 16): The switch node connection to the
Inductor for the Channel 1 regulator. This pin swings from
V IN1 to PGND1.
PGND1D (Pin 14/Pin 17): Ground for SW1D Switching
N-Channel Driver.
PGND1 (Pin 15/Pin 18): Ground for SW1 Switching N-
Channel Driver.
PGND2 (Pin 16/Pin 19): Ground for SW2A and SW2B
Switching N-Channel Driver.
RUN1 (Pin 17/Pin 20): Low Level Logic Input. Enable for
Channel 1. When pulled high, regulator is running. When
at 0V, regulator is off. When both RUN1 and RUN2 are at
0V the part is in shutdown.
PHASE (Pin 18/Pin 21): Low Level Logic Input. Selects
Channel 2 regulator switching phase with respect to
Channel 1 regulator switching. When pulled high, the
SW1 regulator and the SW2A/B regulator are in phase.
When PHASE is at 0V the SW1 regulator and the SW2A/B
regulator are switching 180° out-of-phase.
I TH1 (Pin 19/Pin 22): Error Amplifier Compensation for
Channel 1. Peak current increases with an increase in the
voltage on this pin. Nominal voltage range for this pin is
0V to 1.5V.
9
For more information www.linear.com/3546
3546fc
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