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参数资料
| 型号： | LTC3603EUF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2.5A 20QFN |
| 标准包装： | 91 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 14.5 V |
| 输入电压： | 4.5 V ~ 15 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 300kHz ~ 3MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
LTC3603
OPERATION
Main Control Loop
The LTC3603 is a monolithic, constant-frequency, current
mode step-down DC/DC converter. During normal
operation, the internal top power switch (N-channel
MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the current
comparator trips and turns off the top power MOSFET. The
peak inductor current at which the current comparator shuts
off the top power switch is controlled by the voltage on the
ITH pin. The error amplifier adjusts the voltage on the ITH
pin by comparing the feedback signal from a resistor divider
on the V FB pin with an internal 0.6V reference. When the
load current increases, it causes a reduction in the feedback
voltage relative to the reference. The error amplifier raises
the ITH voltage until the average inductor current matches
the new load current. When the top power MOSFET shuts
off, the synchronous power switch (N-channel MOSFET)
turns on until either the bottom current limit is reached or
the beginning of the next clock cycle. The bottom current
limit is set at –2.5A for forced continuous mode and 0A
for Burst Mode operation.
The operating frequency is externally set by an external
resistor connected between the RT pin and ground. The
practical switching frequency can range from 300kHz to
3MHz.
During start-up, with the feedback voltage less than 10%
its normal value, the part will operate in pulse-skipping
mode. Once the feedback voltage is within the 10% range,
the part operation will switch to the mode selected.
Overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage comes out of
regulation by ±10%. In an overvoltage condition, the top
power MOSFET is turned off and the bottom power MOSFET
is switched on until either the overvoltage condition clears
or the bottom MOSFET’s current limit is reached.
Forced Continuous Mode
Connecting the SYNC/MODE pin to INTV CC will disable Burst
Mode operation and forced continuous current operation.
At light loads, forced continuous mode operation is less
efficient than Burst Mode operation, but may be desirable in
some applications where it is necessary to keep switching
harmonics out of a signal band. The output voltage ripple
is minimized in this mode.
Burst Mode Operation
Connecting the SYNC/MODE pin to a voltage in the range
of 0.42V to 1V enables Burst Mode operation. In Burst
Mode operation, the internal power MOSFETs operate
intermittently at light loads. This increases efficiency by
minimizing switching losses. During Burst Mode opera-
tion, the minimum peak inductor current is externally set
by the voltage on the SYNC/MODE pin and the voltage
on the ITH pin is monitored by the burst comparator to
determine when sleep mode is enabled and disabled.
When the average inductor current is greater than the
load current, the voltage on the ITH pin drops. As the ITH
voltage falls below 330mV, the burst comparator trips and
enables sleep mode. During sleep mode, the top power
MOSFET is held off and the ITH pin is disconnected from
the output of the error amplifier. The majority of the internal
circuitry is also turned off to reduce the quiescent current
to 75μA while the load current is solely supplied by the
output capacitor. When the output voltage drops, the ITH
pin is reconnected to the output of the error amplifier and
the top power MOSFET along with all the internal circuitry
is switched back on. This process repeats at a rate that
is dependent on the load demand. Pulse-skipping opera-
tion is implemented by connecting the SYNC/MODE pin
to ground. This forces the burst clamp level to be at 0V.
As the load current decreases, the peak inductor current
will be determined by the voltage on the ITH pin until the
ITH voltage drops below 330mV. At this point, the peak
inductor current is determined by the minimum on-time
of the current comparator. If the load demand is less than
the average of the minimum on-time inductor current,
switching cycles will be skipped to keep the output volt-
age in regulation.
Frequency Synchronization
The internal oscillator of the LTC3603 can be synchronized
to an external 5V clock connected to the SYNC/MODE pin.
The frequency of the external clock can be in the range of
300kHz to 3MHz. For this application, the oscillator timing
8
For more information www.linear.com/LTC3603
3603fc
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