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| 型号： | LTC3603IUF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 16/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2.5A 20QFN |
| 标准包装： | 91 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 14.5 V |
| 输入电压： | 4.5 V ~ 15 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 300kHz ~ 3MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
LTC3603
APPLICATIONS INFORMATION
R PG
200k
SYNC/MODE
INTV CC
C VCC
1μF
V IN
12V
C IN
22μF
PGOOD
C ITH
1nF
R1
105k
R OSC
105k
R ITH
4.32k
PGOOD
RT
ITH
V FB
RUN
LTC3603
PV IN
PV IN
BOOST
SW
SW
SW
D1
C BST
0.22μF
L1
2.2μH
V OUT
3.3V
2.5A
R2
475k
C FB
10pF
TRACK/SS
PGND
PGND
PGND
C OUT
100μF
L1: VISHAY IHLP2525CZER2R2MO1
C IN : TAIYO YUDEN TMK325BJ226MM-T
C OUT : TDK C3225X5ROJ107M
Figure 6. 12V to 3.3V, 2.5A Regulator at 1MHz, Burst Mode Operation
3603 F06
Choose a standard value of R2 = 475k. The voltage on
the MODE pin will be set to 0.6V by tying the MODE pin
to the FB pin. This will set the burst current equal to ap-
proximately 1A. Figure 6 shows a complete schematic for
this design example.
How to Reduce SW Ringing
As with any switching regulator, there will be voltage
ringing on the SW node, especially for high input voltages.
The ringing amplitude and duration is dependent on the
switching speed (gate drive), layout (parasitic inductance)
and MOSFET output capacitance. This ringing contributes
to the overall EMI, noise and high frequency ripple. One
way to reduce ringing is to optimize layout. A good layout
minimizes parasitic inductance. Adding an RC snubber
from SW to GND is also an effective way to reduce ringing.
Finally, adding a resistor (10Ω to 100Ω) in series with the
BOOST pin will slow down the MOSFET turn-on slew rate
and dampen ringing, but at the cost of reduced efficiency.
Note that since the IC is buffered from high frequency
transients by PCB and bondwire inductances, the ringing
by itself is normally not a concern for reliability.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3603. Check the following in your layout:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3603.
2. Connect the (+) terminal of the input capacitor(s), C IN , as
close as possible to the PV IN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. You can connect the copper areas to any
DC net (PV IN , INTV CC , V OUT , PGND, SGND, or any other
DC rail in your system).
16
For more information www.linear.com/LTC3603
3603fc
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