参数资料
型号: LTC3605IUF#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 7.5 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PQCC24
封装: 4 X 4 MM, LEAD FREE, PLASTIC, MO-220WGGD, QFN-24
文件页数: 2/22页
文件大小: 257K
代理商: LTC3605IUF#TRPBF
LTC3605
10
3605fb
Minimum Off-Time and Minimum On-Time
Considerations
The minimum off-time, tOFF(MIN), is the smallest amount
of time that the LTC3605 is capable of turning on the bot-
tom power MOSFET, tripping the current comparator and
turning the power MOSFET back off. This time is generally
about 70ns. The minimum off-time limit imposes a maxi-
mum duty cycle of tON/(tON + tOFF(MIN)). If the maximum
duty cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
V
IN(MIN) = VOUT
t
ON + tOFF(MIN)
t
ON
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 40ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DCMIN = f tON(MIN)
where tON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula-
tion, but the switching frequency will decrease from its
programmed value. This is an acceptable result in many
applications, so this constraint may not be of critical
importance in most cases. High switching frequencies
may be used in the design without any fear of severe
consequences. As the sections on inductor and capacitor
selection show, high switching frequencies allow the use
of smaller board components, thus reducing the size of
the application circuit.
CIN and COUT Selection
The input capacitance, CIN,isneededtolterthetrapezoidal
wave current at the drain of the top power MOSFET. To
prevent large voltage transients from occurring, a low ESR
input capacitor sized for the maximum RMS current should
be used. The maximum RMS current is given by:
I
RMS IOUT(MAX)
V
OUT
V
IN
V
IN
V
OUT
–1
This formula has a maximum at VIN = 2VOUT, where
IRMS IOUT/2. This simple worst-case condition is com-
monly used for design because even signicant deviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufcient bulk input capacitance is needed to
minimize transient effects during output load changes.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple,
ΔVOUT, is
determined by:
ΔV
OUT <ΔIL
1
8 f C
OUT
+ESR
The output ripple is highest at maximum input voltage
since
ΔIL increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have signicantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints. Their relatively low value of bulk
capacitance may require multiples in parallel.
OPERATION
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