参数资料
型号: LTC3611IWP#TRPBF
厂商: Linear Technology
文件页数: 18/26页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 10A 64QFN
标准包装: 2,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 32 V
输入电压: 4.5 V ~ 32 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 10A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 64-QFN(9x9)
LTC3611
APPLICATIONS INFORMATION
R ON =
= 187k
L =
? ? 1 ? 36V ? ? = 1μH
Δ I L =
? ? 1– 12V ? ? = 3.6A
DesignExample
As a design example, take a supply with the following
speci?cations: V IN = 5V to 36V (12V nominal), V OUT =
2.5V ±5%, I OUT(MAX) = 10A, f = 550kHz. First, calculate
the timing resistor with V ON = V OUT :
2.5V
(2.4) ( 550kHz ) ( 10pF )
and choose the inductor for about 40% ripple current at
the maximum V IN :
2.5V ? 2.5V ?
( 550kHz ) ( 0.4 ) ( 10A )
Selecting a standard value of 1μH results in a maximum
ripple current of:
2.5V ? 2.5V ?
( 550kHz ) ( 1 μ H )
INTV CC
Next, set up V RNG voltage and check the I LIMIT . Tying
V RNG to 1V will set the typical current limit to 15A, and
tying V RNG to GND will result in a typical current around
10A. C IN is chosen for an RMS current rating of about 5A
at 85°C. The output capacitors are chosen for a low ESR
of 0.013Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
ΔV OUT(RIPPLE) = ΔI L(MAX) (ESR)
= (3.6A) (0.013Ω) = 47mV
However, a 0A to 10A load step will cause an output
change of up to:
ΔV OUT(STEP) = ΔI LOAD (ESR) = (10A) (0.013Ω) =130mV
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PGND
C VCC
4.7μF
6.3V
SW
C F
0.1μF
50V
V IN
SGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
C5
C ON
0.01μF
R3
V OUT
2.5V AT
10A
22μF
6.3V
(OPTIONAL)
GND
V IN
5V TO 32V
C IN
4.7μF
50V
×2
C OUT1
100μF
×2
C6 +
100μF
50V
(OPTIONAL)
L1
1μH
GND
V IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PGND
PGND
PGND
SW
SW
SW
SW
SW
SW
SW
SW
PV IN
PV IN
PV IN
PV IN
PV IN
LTC3611
SGND
SGND
SGND
SGND
EXTV CC
V FB
SGND
I ON
SGND
FCB
I TH
V RNG
PGOOD
V ON
SGND
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EXTV CC
C4
0.01μF
39.2k
11k
R PG1
100k
R1
1%
9.5k C1
(OPTIONAL)
R ON
182k
1%
(OPTIONAL)
R5
12.5k
R2
30.1k
1%
C C1
680pF
C C2
100pF
(OPTIONAL)
C2
V OUT
V IN
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
INTV CC
R VON
0
V OUT
SGND
C IN = MURATA GRM32ER71H475K
C OUT = MURATA GRM43SR60J107M
L 1 = COOPER HCP0703-IRO
C5: MURATA GRM31CR60J226KE19
KEEP POWER AND SIGNAL GROUNDS SEPARATE.
CONNECT TO ONE POINT.
INTV CC
D B
CMDSH-3
SW
SW
2
C B1
0.22μF
C SS
0.1μF
R SS1
510k
(OPTIONAL)
V IN
0.01μF
3611 F06
Figure 6. Design Example: 5V to 32V Input to 2.5V/10A at 550kHz
3611fd
  
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