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| 型号： | LTC3670EDDB#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/12页 |
| 文件大小： | 210K |
| 描述： | IC REG TRPL BCK/LINEAR 12DFN |
| 标准包装： | 500 |
| 拓扑： | 降压（降压）同步（1），线性（LDO）（2） |
| 功能： | 任何功能 |
| 输出数： | 3 |
| 频率 - 开关： | 2.25MHz |
| 电压/电流 - 输出 1： | 可调至0.8V，400mA |
| 电压/电流 - 输出 2： | 可调至0.8V，150mA |
| 电压/电流 - 输出 3： | 可调至0.8V，150mA |
| 带 LED 驱动器： | 无 |
| 带监控器： | 无 |
| 带序列发生器： | 无 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFDFN 裸露焊盘 |
| 供应商设备封装： | 12-DFN-EP（3x2） |
| 包装： | 带卷 (TR) |
| 其它名称： | LTC3670EDDB#PBF |
LTC3670
7
3670f
OPERATION
INTRODUCTION
The LTC3670 combines a synchronous buck converter
with two low dropout linear regulators (LDOs) to provide
three low voltage outputs from a higher voltage input
source. The input supply range of 2.5V to 5.5V spans the
single-cell Li-Ion operating range. Each output can be
independently enabled or shut down via the three enable
pins. The output regulation voltages are programmed by
external resistor dividers.
SYNCHRONOUS BUCK REGULATOR
The synchronous buck includes many features: It uses a
Constant-frequency current mode architecture, switching
at 2.25MHz down to light loads. Automatic Burst Mode
operation maintains ef ciency in light load and no-load
situations. Should the input voltage ever fall below the
target output voltage, the buck enters 100% duty cycle
operation. Also known as operating in dropout, this can
extend operating life in battery-powered systems. Soft-start
circuitry limits inrush current when powering on. Output
current is limited in the event of an output short circuit. The
switch node is slew-rate limited to reduce EMI radiation.
The buck regulation control-loop compensation is internal
to the IC and requires no external components.
Main Control Loop
An error ampli er monitors the difference between an
internal reference voltage and the voltage on the BUCKFB
pin. When the BUCKFB voltage is below the reference, the
error ampli er output voltage increases. When the BUCKFB
voltage exceeds the reference, the error ampli er output
voltage decreases.
The error ampli er output controls the peak inductor current
through the following mechanism: Paced by a free-running
2.25MHz oscillator, the main P-channel MOSFET switch is
turned on at the start of the oscillator cycle. Current ows
from the V
IN
supply through this PMOS switch, through
the inductor via the SW pin, and into the output capacitor
and load. When the current reaches the level programmed
by the output of the error ampli er, the PMOS is shut off,
and the N-channel MOSFET synchronous recti er turns
on. Energy stored in the inductor discharges into the load
through this NMOS. The NMOS turns off at the end of the
2.25MHz cycle, or sooner, if the current through it drops
to zero before the end of the cycle.
Through these mechanisms, the error ampli er adjusts the
peak inductor current to deliver the required output power
to regulate the output voltage as sensed by the BUCKFB
pin. All necessary control-loop compensation is internal to
the step-down switching regulator requiring only a single
ceramic output capacitor for stability.
At light loads, the inductor current may reach zero before
the end of the oscillator cycle, which will turn off the NMOS
synchronous recti er. In this case, the SW pin goes high
impedance and will show damped ringing. This is known
as discontinuous operation and is normal behavior for a
switching regulator.
Burst Mode Operation
At light load and no-load conditions, the buck automatically
switches to a power-saving hysteretic control algorithm that
operates the switches intermittently to minimize switching
losses. Known as Burst Mode operation, the buck cycles
the power switches enough times to charge the output
capacitor to a voltage slightly higher than the regulation
point. The buck then goes into a reduced quiescent current
sleep mode. In this state, power loss is minimized while the
load current is supplied by the output capacitor. Whenever
the output voltage drops below a pre-determined value, the
buck wakes from sleep and cycles the switches again until
the output capacitor voltage is once again slightly above
the regulation point. Sleep time thus depends on load cur-
rent, because the load current determines the discharge
rate of the output capacitor. Should load current increase
above roughly 1/4 of the rated output load current, the
buck resumes constant-frequency operation.
Soft-Start
Soft-start in the buck regulator is accomplished by gradually
increasing the maximum allowed peak inductor current
over a 600約 period. This allows the output to rise slowly,
controlling the inrush current required to charge up the
output capacitor. A soft-start cycle occurs whenever the
LTC3670 is enabled, or after a fault condition has occurred
(thermal shutdown or UVLO).
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