参数资料
型号: LTC3721EGN-1#PBF
厂商: Linear Technology
文件页数: 10/16页
文件大小: 0K
描述: IC REG CTRLR ISO PWM CM 16-SSOP
标准包装: 100
PWM 型: 电流模式
输出数: 1
频率 - 最大: 1MHz
占空比: 50%
电源电压: 10V(最小值)
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
产品目录页面: 1335 (CN2011-ZH PDF)
LTC3721-1
OPERATIO
V CC should be bypassed with a 0.1 μ F to 1 μ F multilayer
ceramic capacitor to decouple the fast transient currents
demanded by the output drivers and a bulk tantalum or
electrolytic capacitor to hold up the V CC supply before the
bootstrap winding, or an auxiliary regulator circuit takes
over.
C HOLDUP = (I CC + I DRIVE ) ? t DELAY /3.8V
(minimum UVLO hysteresis)
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC3721-1. Refer to Figure 2 for
various bias supply configurations.
Programming Undervoltage Lockout
The LTC3721-1 provides undervoltage lockout (UVLO)
control for the input DC voltage feed to the power con-
verter in addition to the V CC UVLO function described in the
preceding section. Input DC feed UVLO is provided with
the UVLO pin. A comparator on UVLO compares a divided
down input DC feed voltage to the 5V precision reference.
When the 5V level is exceeded on UVLO, the SS pin is
released and output switching commences. At the same
time a 10 μ A current is enabled which flows out of UVLO
into the voltage divider connected to UVLO. The amount of
DC feed hysteresis provided by this current is: 10 μ A ?
R TOP , (Figure 3). The system UVLO threshold is: 5V ?
{(R TOP + R BOTTOM )/R BOTTOM }. If the voltage applied to
UVLO is present and greater than 5V prior to the V CC UVLO
circuitry activation, then the internal UVLO logic will
prevent output switching until the following three condi-
tions are met: (1) V CC UVLO is enabled, (2) V REF is in
regulation and (3) UVLO pin is greater than 5V.
UVLO can also be used to enable and disable the power
converter. An open drain transistor connected to UVLO as
shown in Figure 3 provides this capability.
Off-Line Bias Supply Generation
If a regulated bias supply is not available to provide V CC
voltage to the LTC3721-1 and supporting circuitry, one
must be generated. Since the power requirement is small,
approximately 1W, and the regulation is not critical, a
simple open-loop method is usually the easiest and lowest
cost approach. One method that works well is to add a
winding to the main power transformer, and post regulate
the resultant square wave with an L-C filter (see Figure 4a).
The advantage of this approach is that it maintains decent
regulation as the supply voltage varies, and it does not
require full safety isolation from the input winding of the
transformer. Some manufacturers include a primary wind-
ing for this purpose in their standard product offerings as
well. A different approach is to add a winding to the output
inductor and peak detect and filter the square wave signal
(see Figure 4b). The polarity of this winding is designed so
V IN
V IN
V CC
12V ± 10%
V BIAS < V UVLO
R START
1.5k
1N5226
3V
1N914
R START
+
15V*
+
C HOLD
2k
1 μ F
1 μ F
1 μ F
C HOLD
19211 F04a
V CC
V CC
Figure 2. Bias Configurations
37211 F02
*OPTIONAL
Figure 4a. Auxiliary Winding Bias Supply
V IN
L OUT
V OUT
R TOP
R START
ISO BARRIER
+
UVLO
ON OFF
R BOTTOM
37211 F03
V CC
1 μ F
C HOLD
19211 F04b
Figure 3. System UVLO Setup
Figure 4b. Output Inductor Bias Supply
sn37211 37211fs
10
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