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参数资料
| 型号： | LTC3723EGN-2#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO VM 16SSOP |
| 标准包装： | 100 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 50% |
| 电源电压： | 10V（最小值） |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
LTC3723-1/LTC3723-2
OPERATIO
Please refer to the detailed Block Diagrams for this discus-
sion. The LTC3723-1 and LTC3723-2 are synchronous
PWM push-pull controllers. The LTC3723-1 operates with
peak pulse-by-pulse current mode control while the
LTC3723-2 offers voltage mode control operation. They
are best suited for moderate to high power isolated power
systems where small size and high efficiency are required.
The push-pull topology delivers excellent transformer
utilization and requires only two low side power MOSFET
switches. Both controllers generate 180 ° out of phase
0% to < 50% duty cycle drive signals on DRVA and DRVB.
The external MOSFETs are driven directly by these power-
ful on-chip drivers. The external MOSFETs typically con-
trol opposite primary windings of a centertapped power
transformer. The centertap primary winding is connected
to the input DC feed. The secondary of the transformer can
be configured in different synchronous or nonsynchronous
configurations depending on the application needs.
The duty ratio is controlled by the voltage on COMP. A
switching cycle commences with the falling edge of the
internal oscillator clock pulse. The LTC3723-1 attenuates
the voltage on COMP and compares it to the current sense
signal to terminate the switching cycle. The LTC3723-2
compares the voltage on COMP to a timing ramp to
terminate the cycle. The LTC3723-2’s C T waveform can be
used for this purpose or separate R-C components can be
connected to RAMP to generate the timing ramp. If the
voltage on CS exceeds 300mV, the present cycle is termi-
nated. If the voltage on CS exceeds 600mV, all switching
stops and a soft-start sequence is initiated.
The LTC3723-1 / LTC3723-2 also provide drive signals for
secondary side synchronous rectifier MOSFETs. Synchro-
nous rectification improves converter efficiency, espe-
cially as the output voltages drop. Independent turn-off
control of the synchronous rectifiers is provided via SPRG
in order to optimize the benefit of the synchronous recti-
fiers. A resistor from SPRG to GND sets the desired turn
Programming Driver Dead-Time
The LTC3723-1/LTC3723-2 controllers include a feature
to program the minimum time between the output signals
on DRVA and DRVB commonly referred to as the driver
dead-time. This function will come into play if the control-
ler is commanded for maximum duty cycle. The dead-time
is set with an external resistor connected between DPRG
and V REF (see Figure 1). The nominal regulated voltage on
DPRG is 2V. The external resistor programs a current
which flows into DPRG. The dead-time can be adjusted
from 90ns to 300ns with this resistor. The dead-time can
also be modulated based on an external current source
that feeds current into DPRG. Care must be taken to limit
the current fed into DPRG to 350 μ A or less. An internal
10 μ A current source sets a maximum deadtime if DPRG is
floated. The internal current source causes the programmed
deadtime to vary non-linearly with increasing values of
RDPRG (see typical performance characteristics). An ex-
ternal 200k resistor connected from DPRG to GND will
compensate for the internal 10 μ A current source and
linearize the deadtime delay vs RDPRG characteristic.
Powering the LTC3723-1/LTC3723-2
The LTC3723-1/LTC3723-2 utilize an integrated V CC shunt
regulator to serve the dual purposes of limiting the voltage
applied to V CC as well as signaling that the chip’s bias
voltage is sufficient to begin switching operation (under
voltage lockout). With its typical 10.2V turn-on voltage
and 4.2V UVLO hysteresis, the LTC3723-1/LTC3723-2 is
tolerant of loosely regulated input sources such as an
auxiliary transformer winding. The V CC shunt is capable of
sinking up to 40mA of externally applied current. The
UVLO turn-on and turn-off thresholds are derived from an
internally trimmed reference making them extremely ac-
curate. In addition, the LTC3723-1/LTC3723-2 exhibits
V REF
off delay.
R DPRG
DPRG
10 μ A
A host of other features including an error amplifier,
system UVLO programming, adjustable leading edge blank-
ing, slope compensation and programmable dead-time
OPTIONAL
200k
+
V 2V
–
2.5V
+
–
TURN-ON
OUTPUT
provide flexibility for a variety of applications.
372312 F01
Figure 1. Delay Timeout Circuitry
372312f
10
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