参数资料
型号: LTC3727EG-1
厂商: Linear Technology
文件页数: 14/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 47
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 580kHz
占空比: 99%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 管件
LTC3727/LTC3727-1
APPLICATIO S I FOR ATIO
The inductor value also has secondary effects. The transi-
tion to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R SENSE . Lower
inductor values (higher Δ I L ) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the inductance value is determined, the type of
inductor must be selected. Actual core loss is independent
of core size for a fixed inductor value, but it is very
dependent on inductance selected. As inductance in-
The peak-to-peak drive levels are set by the INTV CC
voltage. This voltage is typically 7.5V during start-up (see
EXTV CC Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V IN < 5V); then, sub-logic level threshold MOSFETs
(V GS(TH) < 3V) should be used. Pay close attention to the
BV DSS specification for the MOSFETs as well; most of the
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R DS(ON) , reverse transfer capacitance C RSS ,
input voltage and maximum output current. When the
LTC3727 is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle =
creases, core losses go down. Unfortunately, increased
inductance requires more turns of wire and therefore
copper (I 2 R) losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so designers can concen-
V OUT
V IN
Synchronous Switch Duty Cycle =
V IN – V OUT
V IN
( I MAX ) 2 ( ) R DS ( ON ) +
P MAIN =
1 + δ
k ( V IN ) ( I MAX )( C RSS )( f )
trate on reducing I 2 R loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
The MOSFET power dissipations at maximum output
current are given by:
V OUT
V IN
2
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
P SYNC =
V IN – V OUT
V IN
( I MAX ) 2 ( 1 + δ ) R DS ( ON )
ally cost more than powdered iron core inductors with
similar characteristics. The choice of which style inductor
to use mainly depends on the price vs size requirements
and any radiated field/EMI requirements. New designs for
high current surface mount inductors are available from
numerous manufacturers, including Coiltronics, Vishay,
TDK, Pulse, Panasonic, Wuerth, Coilcraft, Toko and Sumida.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC3727: One N-channel MOSFET for the
top (main) switch, and one N-channel MOSFET for the
where δ is the temperature dependency of R DS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I 2 R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V IN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for V IN > 20V the transition losses rapidly
increase to the point that the use of a higher R DS(ON) device
with lower C RSS actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
bottom (synchronous) switch.
3727fc
14
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