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| 型号： | LTC3736EGN-1#TR |
| 厂商： | Linear Technology |
| 文件页数： | 14/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 24-SSOP |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 825kHz |
| 占空比： | 100% |
| 电源电压： | 2.75 V ~ 9.8 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
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LTC3736-1
APPLICATIO S I FOR ATIO
The typical LTC3736-1 application circuit is shown in
Figure 13. External component selection for each of the
LTC3736-1’s controllers is driven by the load requirement
A reasonable starting point is setting ripple current I RIPPLE
to be 40% of I OUT(MAX) . Rearranging the above equation
yields:
and begins with the selection of the inductor (L) and the
power MOSFETs (MP and MN).
R DS ( ON )( MAX ) =
5 ? V SENSE ( MAX )
?
6 I OUT ( MAX )
Power MOSFET Selection
Each of the LTC3736-1’s two controllers requires two
external power MOSFETs: a P-channel MOSFET for the
topside (main) switch and an N-channel MOSFET for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V BR(DSS) ,
for Duty Cycle < 20%.
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of R DS(ON) to provide the required
amount of load current:
threshold voltage V GS(TH) , on-resistance R DS(ON) , reverse
transfer capacitance C RSS , turn-off delay t D(OFF) and the
total gate charge Q G .
R DS ( ON )( MAX ) =
5
6
? SF ?
? V SENSE ( MAX )
I OUT ( MAX )
The gate drive voltage is the input supply voltage. Since the
LTC3736-1 is designed for operation down to low input
voltages, a sublogic level MOSFET (R DS(ON) guaranteed at
V GS = 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure
that the input supply to the LTC3736-1 is less than the
absolute maximum MOSFET V GS rating, which is
typically 8V.
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average
output load current I OUT(MAX) is equal to the peak inductor
current minus half the peak-to-peak ripple current I RIPPLE .
The LTC3736-1’s current comparator monitors the drain-
to-source voltage V DS of the P-channel MOSFET, which is
sensed between the SENSE + and SW pins. The peak
inductor current is limited by the current threshold, set by
the voltage on the I TH pin of the current comparator. The
voltage on the I TH pin is internally clamped, which limits
the maximum current sense threshold ? V SENSE(MAX) to
approximately 125mV when IPRG is floating (85mV when
IPRG is tied low; 204mV when IPRG is tied high).
The output current that the LTC3736-1 can provide is
where SF is a scale factor whose value is obtained from the
curve in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature.
The following equation is a good guide for determining the
required R DS(ON)MAX at 25 ° C (manufacturer’s specifica-
tion), allowing some margin for variations in the
LTC3736-1 and external component values:
5 ? V SENSE ( MAX )
R DS ( ON )( MAX ) = ? 0 . 9 ? SF ?
6 I OUT ( MAX ) ? ρ T
The ρ T is a normalizing term accounting for the tempera-
ture variation in on-resistance, which is typically about
0.4%/ ° C, as shown in Figure 5. Junction to case tempera-
ture T JC is about 10 ° C in most applications. For a maxi-
mum ambient temperature of 70 ° C, using ρ 80 ° C ~ 1.3 in
the above equation is a reasonable choice.
The power dissipated in the top and bottom MOSFETs
strongly depends on their respective duty cycles and load
current. When the LTC3736-1 is operating in continuous
mode, the duty cycles for the MOSFETs are:
– RIPPLE
V OUT
BottomN ? ChannelDuty Cycle = IN OUT
given by:
I OUT ( MAX ) =
? V SENSE ( MAX )
R DS ( ON )
I
2
Top P ? ChannelDuty Cycle =
V IN
V – V
V IN
37361f
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