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参数资料
| 型号： | LTC3785EUF-1#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING REGULATOR, 650 kHz SWITCHING FREQ-MAX, PQCC24 |
| 封装： | 4 X 4 MM, LEAD FREE, PLASTIC, MO-220WGGD, QFN-24 |
| 文件页数： | 17/20页 |
| 文件大小： | 213K |
| 代理商： | LTC3785EUF-1#PBF |
LTC3785-1
6
37851fa
PIN FUNCTIONS
VSENSE (Pin 4): Overvoltage and Undervoltage Sense.
The overvoltage threshold is internally set 7.5% above
the regulated FB voltage and the undervoltage threshold
is internally set 7.5% below the FB regulated voltage. This
pin can be tied to FB but to optimize the response time it
is recommended that a separate voltage divider from VOUT
be applied. The divider can be skewed from the feedback
value to achieve the desired UV or OV threshold.
ILSET (Pin 5): Current Limit Set. A resistor from this pin
to ground sets the current limit threshold from the ISVIN
and ISSW1 pins.
CCM (Pin 6): Continuous Conduction Mode Control Pin.
When set low, the inductor current is allowed to go slightly
negative (–15mV referenced to the ISVOUT – ISSW2 pins).
Whendrivenhigh,thereversecurrentlimitissettothesimilar
value of the forward current limit set by the ILSET pin.
RT (Pin 7): Oscillator Programming Pin. A resistor from
this pin to GND sets the free-running frequency of the IC.
fOSC 2.5e10/RT.
MODE (Pin 8): Burst Mode Control Pin.
MODE = High: Enable Burst Mode Operation. In Burst
Mode operation the operation is variable frequency,
which provides a signicant efciency improvement
at light loads. The Burst Mode operation will continue
until the pin is driven low.
MODE=Low:DisableBurstModeoperationandmaintain
low noise, constant frequency operation.
PGOOD (Pin 9): Open Drain Output. PGOOD is pulled to
ground when the voltage on VSENSE is not within ±7.5%
of its setpoint. PGOOD will also be pulled low when the
part is in shutdown or input UVLO.
ISVOUT (Pin 10): Reverse Current Limit Comparator Non-
inverting Input. This pin is normally connected to the drain
of the N-channel MOSFET D (TG2 driven).
VBST2 (Pin 11): Boosted Floating Driver Supply for Boost
Switch D. This pin will swing from a diode below VCC up
to VOUT + VCC – VDIODE.
SW2 (Pin 13): Ground Reference for Driver D. Gate drive
from TG2 will reference to the common point of output
switches C and D.
ISSW2 (Pin 14): Reverse Current Limit Comparator Invert-
ing Input. This pin is normally connected to the source of
the N-channel MOSFET D (TG2 driven).
VDRV (Pin 16): Driver Supply for Ground Referenced
Switches. Connect this pin to VCC potential.
BG1, BG2 (Pins 17, 15): Bottom gate driver pins drive
the ground referenced N-channel MOSFET switches B
and C.
ISSW1 (Pin 18): Forward Current Limit Comparator Non-
inverting Input. This pin is normally connected to the
source of the N-channel MOSFET A (TG1 driven).
SW1 (Pin 19): Ground Reference for Driver A. Gate drive
from TG1 will reference to the common point of output
switches A and B.
TG1, TG2 (Pins 20, 12): Top gate drive pins drive the
top N-channel MOSFET switches A and D with a voltage
swing equal to VCC – VDIODE superimposed on the SW1
and SW2 nodes respectively.
VBST1 (Pin 21): Boosted Floating Driver Supply for the
Buck Switch A. This pin will swing from a diode below
VCC up to VIN + VCC – VDIODE.
ISVIN (Pin 22): Forward Current Limit Comparator Invert-
ing Input. This pin is normally connected to the drain of
N-channel MOSFET A (TG1 driven).
VCC (Pin 23): Internal 4.35V LDO Regulator Output. The
driver and control circuits are powered from this voltage
to limit the maximum VGS drive voltage. Decouple this pin
to power ground with at least a 4.7μF ceramic capacitor.
For low VIN applications, VCC can be bootstrapped from
VOUT through a Schottky diode.
VIN (Pin 24): Input Supply Pin for the VCC Regulator. A
ceramic capacitor of at least 10μF is recommended close
to the VIN and GND pins.
Exposed Pad (Pin 25): The GND and PGND pins are con-
nected to the Exposed Pad which must be connected to
the PCB ground for electrical contact and rated thermal
performance.
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