参数资料
型号: LTC3789EGN#PBF
厂商: Linear Technology
文件页数: 15/30页
文件大小: 0K
描述: IC REG CTRLR BST PWM CM 28-SSOP
标准包装: 49
PWM 型: 电流模式
输出数: 1
频率 - 最大: 710kHz
占空比: 98%
电源电压: 4 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 管件
LTC3789
OPERATION
Constant-Current Regulation
The LTC3789 provides a constant-current regulation loop
for either input or output current. A sensing resistor close
to the input or output capacitor will sense the input or
output current. When the current exceeds the programmed
current limit, the voltage on the I TH pin will be pulled down
to maintain the desired maximum input or output current.
The input current limit function prevents overloading the
DC input source, while the output current limit provides
a building block for battery charger or LED driver applica-
tions. It can also serve as an extra current limit protection
for a constant-voltage regulation application. The input/
output current limit function has an operating voltage range
of GND to the absolute maximum V OUT (V IN ).
Frequency Selection and Phase-Locked Loop (FREQ
and MODE/PLLIN Pins)
The selection of switching frequency is a trade-off between
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage. The switching
frequency of the LTC3789’s controllers can be selected
using the FREQ pin. If the MODE/PLLIN pin is not being
driven by an external clock source, the FREQ pin can be
used to program the controller’s operating frequency from
200kHz to 600kHz.
Switching frequency is determined by the voltage on the
FREQ pin. Since there is a precision 10μA current flowing
out of the FREQ pin, the user can program the controller’s
switching frequency with a single resistor to SGND. A
curve is provided in the Applications Information section
to show the relationship between the voltage on the FREQ
pin and the switching frequency.
A phase-locked loop (PLL) is integrated on the LTC3789
to synchronize the internal oscillator to an external clock
source driving the MODE/PLLIN pin. The controller oper-
ates in forced continuous mode when it is synchronized.
The PLL filter network is integrated inside the LTC3789.
The PLL is capable of locking to any frequency within the
range of 200kHz to 600kHz. The frequency setting resis-
tor should always be present to set the controller’s initial
switching frequency before locking to the external clock.
Power Good (PGOOD) Pins
The PGOOD pin is connected to the open drain of an internal
N-channel MOSFET. When V FB is not within ±10% of the
0.8V reference voltage, the PGOOD pin is pulled low. The
PGOOD pin is also pulled low when RUN is below 1.22V
or when the LTC3789 is in the soft-start phase. There is
an internal 20μs power good or bad mask when V FB goes
in or out of the ±10% window. The PGOOD pin is allowed
to be pulled up by an external resistor to INTV CC or an
external source of up to 6V.
Short-Circuit Protection, Current Limit and Current
Limit Foldback
The maximum current threshold of the controller is limited
by a voltage clamp on the I TH pin. In every boost cycle,
the sensed maximum peak voltage is limited to 140mV.
In every buck cycle, the sensed maximum valley voltage
is limited to 90mV. In the buck-boost region, only peak
sensed voltage is limited by the same threshold as in
the boost region.
The LTC3789 includes current foldback to help limit load
current when the output is shorted to ground. If the out-
put falls below 50% of its nominal output level, then the
maximum sense voltage is progressively lowered from
its maximum value to one-third of the maximum value.
Foldback current limiting is disabled during the soft-start.
Under short-circuit conditions, the LTC3789 will limit the
current by operating as a buck with very low duty cycles,
and by skipping cycles. In this situation, synchronous
switch B will dissipate most of the power (but less than
in normal operation).
3789fa
15
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