参数资料
型号: LTC3806EDE#PBF
厂商: Linear Technology
文件页数: 13/20页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 12-DFN
标准包装: 91
PWM 型: 电流模式
输出数: 1
频率 - 最大: 290kHz
占空比: 94%
电源电压: 10 V ~ 75 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 12-WFDFN 裸露焊盘
包装: 管件
LTC3806
APPLICATIO S I FOR ATIO
D MAX =
= 0 . 579
3 . 3 V +
R SENSE ≤
For a minimum input voltage of 36V, the largest duty factor
is:
3 . 3 V
36 V
15
and the minimum percentage ripple is:
cycle), and only about 70mV at a duty cycle of 92% due to
slope compensation. Use Figure 4 and D MAX to determine
the maximum allowable drop in the sense resistor. Using
this value calculate:
V DROP
I PK
X MIN = IN MAX
f ? L P IN
V 2 ? D
? P
2
200
150
T A = 25 ° C
36 V ? 0 . 579
=
2 2
250 kHz ? 7 5 7 μ H ? 11 . 34 W
= 20 . 2 %
100
Transformer Core Selection
Once L P is known, the type of transformer must be selected.
50
High efficiency converters generally cannot afford the core
loss found in low cost powdered iron cores, forcing the use
of more expensive ferrite cores. Actual core loss is inde-
0
0
0.2
0.4 0.5
DUTY CYCLE
0.8
1.0
3806 F04
pendent of core size for a fixed inductance, but is very
dependent on the inductance selected. As inductance in-
creases, core losses go down. Unfortunately, increased
inductance requires more turns of wire and therefore cop-
per losses will increase. Generally, there is a tradeoff be-
tween core losses and copper losses that needs to be
balanced. In addition, increased winding resistance will
degrade cross regulation.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can con-
centrate on copper losses and preventing saturation.
Ferrite core material saturates “hard,” meaning that the
Figure 4. Maximum SENSE Threshold Voltage vs Duty Cycle
Capacitor Selection
In a flyback converter, the input and output current flows
in pulses placing severe demands on the input and output
filter capacitors. The input and output filter capacitors
should be selected based on RMS current ratings and
ripple voltage.
Select an input capacitor with a ripple current rating
greater than:
inductance collapses rapidly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequently, output voltage ripple. Do
I RMS =
P IN
V IN ( MIN )
1– D MAX
D MAX
not allow the core to saturate! The maximum peak
primary current occurs at minimum V IN :
Continuing the example:
? ? 1 + MIN ?
I RMS =
= 0 . 269 A RMS
I PK =
P IN
V IN ( MIN ) ? D MAX
? X ?
? 2 ?
11. 34 W  1– 0. 579
36 V 0 . 579
Low effective series resistance and inductance is also
Current Sense Resistor Selection
The control circuit limits the maximum voltage drop
across the sense resistor to about 110mV (at low duty
important in the input capacitor since it affects the electro-
magnetic interference suppression. In some instances
high ESR can also produce stability problems because
flyback converters exhibit a negative input resistance
3806fb
13
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