参数资料
型号: LTC3806EDE#TRPBF
厂商: Linear Technology
文件页数: 14/20页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 12-DFN
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 290kHz
占空比: 94%
电源电压: 10 V ~ 75 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 12-WFDFN 裸露焊盘
包装: 带卷 (TR)
LTC3806
APPLICATIO S I FOR ATIO
= I
D MAX
I RMS = 2 A
= 2 . 35 A RMS
0 . 01 ? V OUT ? ( 1 – D MAX )
C OUT ≥
characteristic. Refer to Application Note 19 for more
information.
The output capacitor is sized to handle the ripple current
and to insure acceptable output voltage ripple. The output
capacitor should have a ripple current rating greater than:
I RMS OUT
1– D MAX
This should be calculated for each output. For our ex-
ample, the OUT1 capacitor needs an RMS current rating
greater than:
0 . 579
1 – 0 . 579
The OUT2 capacitor RMS current rating is calculated in a
similar manner. The capacitor rating should be greater
than 586mA RMS . One final note, most capacitor manufac-
turers base their ripple current ratings on only 2000 hours
life. This makes it advisable to further derate the capacitor
or to choose a capacitor rated at a higher temperature than
required.
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct compo-
nent for a given output ripple voltage. The effects of these
three parameters (ESR, ESL and bulk C) on the output
voltage ripple waveform are illustrated in Figure 5 for a
typical flyback converter.
The capacitance calculation begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging Δ V.
For the purpose of simplicity we will choose 2% for the
maximum output ripple, to be divided equally between the
ESR step and the charging/discharging Δ V. This percent-
age ripple will change, depending on the requirements of
the application, and the equations provided below can
easily be modified.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the
following equation:
ESR COUT ≤
I OUT
For the bulk C component, which also contributes 1% to
the total ripple:
I OUT
0 . 01 ? V OUT ? F
For many designs it is possible to choose a single capaci-
tor type that satisfies both the ESR and bulk C require-
ments for the design. In certain demanding applications,
however, the ripple voltage can be improved significantly
by connecting two or more types of capacitors in parallel.
For example, using a low ESR ceramic capacitor can
minimize the ESR step, while an electrolytic capacitor can
be used to supply the required bulk C.
PRIMARY
CURRENT
SECONDARY
CURRENT
I PRI
I PRI
N
Δ V COUT
OUTPUT VOLTAGE
RIPPLE WAVEFORM
Δ V ESR
RINGING
DUE TO ESL
3806 F05
Figure 5. Typical Flyback Converter Waveforms (Single Output)
3806fb
14
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