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| 型号： | LTC3823IGN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 28-SSOP |
| 标准包装： | 49 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 90% |
| 电源电压： | 4.5 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
LTC3823
APPLICATIONS INFORMATION
When there is no R ON resistor connected to the I ON pin,
the on-time t ON is theoretically in?nite, which in turn could
damage the converter. To prevent this, the LTC3823 detects
this fault condition and provides a minimum I ON current
of 5μA to 10μA.
Changes in the load current magnitude will cause fre-
MOSFET back off. This time is generally about 280ns.
The minimum off-time limit imposes a maximum duty
cycle of t ON /(t ON + t OFF(MIN) ). If the maximum duty cycle
is reached, due to a dropping input voltage for example,
then the output will drop out of regulation. The minimum
input voltage to avoid dropout is:
quency shift. Parasitic resistance in the MOSFET switches
and inductor reduce the effective voltage across the
inductance, resulting in increased duty cycle as the load
V IN ( MIN ) = V OUT
t ON + t OFF (MIN)
t ON
current increases. By lengthening the on-time slightly as
current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the I TH pin to the V ON pin and V OUT . The values
A plot of maximum duty cycle vs frequency is shown in
Figure 4.
2.0
required will depend on the parasitic resistances in the
speci?c application. A good starting point is to feed about
1.5
DROPOUT
25% of the voltage change at the I TH pin to the V ON pin
as shown in Figure 3a. Place capacitance on the V ON pin
to ?lter out the I TH variations at the switching frequency.
The resistor load on I TH reduces the DC gain of the error
amp and degrades load regulation, which can be avoided
1.0
0.5
REGION
by using the PNP emitter follower of Figure 3b.
0
R VON1
0
0.25 0.50 0.75
1.0
V OUT
30k
V ON
DUTY CYCLE (V OUT /V IN )
3823 F04
R VON2
C VON
100k
0.01μF
LTC3823
Figure 4. Maximum Switching Frequency vs Duty Cycle
R C
I TH
R VON1
C C
(3a)
Inductor Selection
Given the desired input and output voltages, the induc-
tor value and operating frequency determine the ripple
Δ I L = ? OUT ? ? 1 ? OUT ?
V OUT
INTV CC
3k
10k
Q1
2N5087
R VON2
10k
C VON
0.01μF
R C
V ON
LTC3823
I TH
current:
? V ? ? V ?
? f ? L ? ? V IN ?
C C
3823 F03
Lower ripple current reduces core losses in the inductor,
(3b)
Figure 3. Correcting Frequency Shift with Load Current Changes
Minimum Off-Time and Dropout Operation
The minimum off-time t OFF(MIN) is the smallest amount of
time that the LTC3823 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
ESR losses in the output capacitors and output voltage
ripple. Highest ef?ciency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, ef?ciency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I OUT(MAX) . The largest ripple current
occurs at the highest V IN . To guarantee that ripple current
3823fd
13
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