参数资料
型号: LTC3827IG-1#PBF
厂商: Linear Technology
文件页数: 8/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 47
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 580kHz
占空比: 99.4%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)
LTC3827-1
PIN FUNCTIONS
I TH1, I TH2 (Pins 1, 13): Error Ampli?er Outputs and Switch-
ing Regulator Compensation Points. Each associa-ted
channel’s current comparator trip point increases with
this control voltage.
V FB1 , V FB2 (Pins 2, 12): Receives the remotely sensed
feedback voltage for each controller from an external
resistive divider across the output.
SENSE1 + , SENSE2 + (Pins 3, 11): The (+) Input to the
Differential Current Comparators. The I TH pin voltage and
controlled offsets between the SENSE – and SENSE + pins in
conjunction with R SENSE set the current trip threshold.
SENSE1 – , SENSE2 – (Pins 4, 10): The (–) Input to the
Differential Current Comparators.
PLLLPF (Pin 5): The phase-locked loop’s lowpass ?lter is
tied to this pin when synchronizing to an external clock.
Alternatively, tie this pin to GND, INTV CC or leave ?oating to
select 250kHz, 530kHz or 400kHz switching frequency.
PLLIN/MODE (Pin 6): External Synchronization Input to
Phase Detector and Forced Continuous Control Input. When
an external clock is applied to this pin, the phase-locked
loop will force the rising TG1 signal to be synchronized
with the rising edge of the external clock. In this case, an
R-C ?lter must be connected to the PLLLPF pin. When
not synchronizing to an external clock, this input, which
acts on both controllers, determines how the LTC3827-1
operates at light loads. Pulling this pin below 0.7V selects
Burst Mode operation. Tying this pin to INTV CC forces
continuous inductor current operation. Tying this pin to
a voltage greater than 0.9V and less than INTV CC –1.2V
selects pulse-skipping operation.
SGND (Pin 7): Small-Signal Ground common to both
controllers, must be routed separately from high cur-
rent grounds to the common (–) terminals of the
C IN capacitors.
RUN1, RUN2 (Pins 8, 9): Digital Run Control Inputs for
Each Controller. Forcing either of these pins below 0.7V
shuts down that controller. Forcing both of these pins
below 0.7V shuts down the entire LTC3827-1, reducing
quiescent current to approximately 8μA.
EXTV CC (Pin 20): External Power Input to an Internal LDO
Connected to INTV CC . This LDO supplies INTV CC power,
bypassing the internal LDO powered from V IN whenever
EXTV CC is higher than 4.7V. See EXTV CC Connection in
the Applications Information section. Do not exceed 10V
on this pin.
PGND (Pin 21): Driver Power Ground. Connects to the sources
of bottom (synchronous) N-channel MOSFETs, anodes of
the Schottky recti?ers and the (–) terminal(s) of C IN .
V IN (Pin 22): Main Supply Pin. A bypass capacitor should
be tied between this pin and the signal ground pin.
BG1, BG2 (Pins 23, 18): High Current Gate Drives for Bot-
tom (Synchronous) N-Channel MOSFETs. Voltage swing
at these pins is from ground to INTV CC .
BOOST1, BOOST2 (Pins 24, 17): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the BOOST and SW pins and Schottky diodes are
tied between the BOOST and INTV CC pins. Voltage swing
at the BOOST pins is from INTV CC to (V IN + INTV CC ).
SW1, SW2 (Pins 25, 16): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V IN .
TG1, TG2 (Pins 26, 15): High Current Gate Drives for Top
N-Channel MOSFETs. These are the outputs of ?oating
drivers with a voltage swing equal to INTV CC – 0.5V su-
perimposed on the switch node voltage SW.
PGOOD1 (Pin 27): Open-Drain Logic Output. PGOOD1 is
pulled to ground when the voltage on the V FB1 pin is not
within ±10% of its set point.
TRACK/SS1, TRACK/SS2 (Pins 28, 14): External Track-
ing and Soft-Start Input. The LTC3827-1 regulates the
V FB1,2 voltage to the smaller of 0.8V or the voltage on the
TRACK/SS1,2 pin. A internal 1μA pull-up current source
is connected to this pin. A capacitor to ground at this
pin sets the ramp time to ?nal regulated output voltage.
Alternatively, a resistor divider on another voltage supply
connected to this pin allows the LTC3827-1 output to track
the other supply during startup.
INTV CC (Pin 19): Output of the Internal Linear Low Dropout
Regulator. The driver and control circuits are powered
from this voltage source. Must be decoupled to power
ground with a minimum of 4.7μF tantalum or other low
ESR capacitor.
38271fe
8
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