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参数资料
| 型号： | LTC3828 |
| 厂商： | Linear Technology Corporation |
| 英文描述： | 16-Bit Bus Transceiver With 3-State Outputs 48-SSOP -40 to 85 |
| 中文描述： | 双2相降压型跟踪控制器 |
| 文件页数： | 17/32页 |
| 文件大小： | 396K |
| 代理商： | LTC3828 |
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LTC3828
3828f
17
APPLICATIOU
W
U
U
SynchronousSwitchDutyCycle
V
V
V
IN
OUT
IN
=
–
The MOSFET power dissipations at maximum output
current are given by:
P
V
V
I
R
V
I
R
C
V
V
V
f
MAIN
OUT
IN
)
MAX
DS ON
(
IN
MAX
2
1
–
DR
MILLER
INTVCC
THMIN
THMIN
=
(
)
+
(
)
+
(
(
)(
)
+
( )
2
2
1
1
δ
)
P
V
V
V
I
R
SYNC
IN
OUT
IN
MAX
DS ON
(
=
(
)
+
(
)
–
)
2
1
δ
where
δ
is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 2
) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 12V the
high current efficiency generally improves with larger
MOSFETs, while for V
IN
≥
12V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1+
δ
) is generally given for a MOSFET in the form
of a normalized R
DS(ON)
vs Temperature curve, but
δ
= 0.005/
°
C can be used as an approximation for low
voltage MOSFETs.
The Schottky diode D1 shown in Figure 1 conducts during
the dead-time between the conduction of the two power
MOSFETs. This prevents the body diode of the bottom
MOSFET from turning on, storing charge during the dead-
time and requiring a reverse recovery period that could
cost efficiency at high V
IN
. A 1A to 3A Schottky is generally
a good compromise for both regions of operation due to
the relatively small average current. Larger diodes result in
additional transition losses due to their larger junction
capacitance.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplified by the multiphase archi-
tecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst case RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula below to determine the maximum RMS current
requirement. Increasing the output current, drawn from
the other out-of-phase controller, will actually decrease
the input RMS ripple current from this maximum value
(see Figure 3). The out-of-phase technique typically re-
duces the input capacitor’s RMS ripple current by a factor
of 30% to 70% when compared to a single phase power
supply solution.
The type of input capacitor, value and ESR rating have
efficiency effects that need to be considered in the selec-
tion process. The capacitance value chosen should be
sufficient to store adequate charge to keep high peak
battery currents down. 20
μ
F to 40
μ
F is usually sufficient
for a 25W output supply operating at 260kHz. The ESR of
the capacitor is important for capacitor power dissipation
as well as overall battery efficiency. All of the power (RMS
ripple current ESR) not only heats up the capacitor but
wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used as
input capacitors, but each has drawbacks: ceramic voltage
coefficients are very high and may have audible piezoelec-
tric effects; tantalums need to be surge-rated; OS-CONs
suffer from higher inductance, larger case size and limited
surface-mount applicability; electrolytics’ higher ESR and
dryout possibility require several to be used. Multiphase
systems allow the lowest amount of capacitance overall.
As little as one 22
μ
F or two to three 10
μ
F ceramic capaci-
tors are an ideal choice in a 20W to 35W power supply due
to their extremely low ESR. Even though the capacitance
at 20V is substantially below their rating at zero-bias, very
low ESR loss makes ceramics an ideal candidate for
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