参数资料
型号: LTC3834EFE#TRPBF
厂商: Linear Technology
文件页数: 14/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 20TSSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 580kHz
占空比: 99.4%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
LTC3834
APPLICATIONS INFORMATION
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
The MOSFET power dissipations at maximum output
current are given by:
not allow the core to saturate!
Power MOSFET and Schottky Diode (Optional)
P MAIN =
V OUT
V IN
( I MAX ) 2 ( 1 + δΔ T ) R DS ( ON ) +
? ( f )
+
? V INTVCC THMIN
– V V T HMIN ?
Selection
Two external power MOSFETs must be selected for the
LTC3834: one N-channel MOSFET for the top (main)
switch, and one N-channel MOSFET for the bottom (syn-
chronous) switch.
? ? A ? ?
( V IN ) 2 ? I M 2 X ? ( R DR )( C MILLER ) ?
? 1 1 ?
?
V IN OUT
Thepeak-to-peakdrivelevelsaresetbytheINTV CC voltage.
This voltage is typically 5V during start-up (see EXTV CC Pin
Connection). Consequently, logic-level threshold MOSFETs
P SYNC =
– V
V IN
( I MAX ) 2 ( 1 + δΔ T ) R DS ( ON )
Main Switch Duty Cycle =
must be used in most applications. The only exception is
if low input voltage is expected (V IN < 5V); then, sub-logic
level threshold MOSFETs (V GS(TH) < 3V) should be used.
Pay close attention to the BV DSS speci?cation for the
MOSFETs as well; most of the logic-level MOSFETs are
limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R DS(ON) , Miller capacitance C MILLER , input
voltage and maximum output current. Miller capacitance,
C MILLER , can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C MILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
?at divided by the speci?ed change in V DS . This result is
then multiplied by the ratio of the application applied V DS
to the Gate charge curve speci?ed V DS . When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
V OUT
V IN
where δ is the temperature dependency of R DS(ON) and
R DR (approximately 2Ω) is the effective driver resistance
at the MOSFET ’s Miller threshold voltage. V THMIN is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I 2 R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V IN < 20V
the high current ef?ciency generally improves with larger
MOSFETs, while for V IN > 20V the transition losses rapidly
increase to the point that the use of a higher R DS(ON) device
with lower C MILLER actually provides higher ef?ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δΔ T) is generally given for a MOSFET in
the form of a normalized R DS(ON) vs Temperature curve,
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diode D1 shown in Figure 6 conducts
V IN OUT
Synchronous Switch Duty Cycle =
– V
V IN
during the dead-time between the conduction of the two
power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in ef?ciency at high V IN . A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
3834fb
14
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