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参数资料
| 型号： | LTC3834EUFD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 20-QFN |
| 标准包装： | 73 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 580kHz |
| 占空比： | 99.4% |
| 电源电压： | 4 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3834
PIN FUNCTIONS
(FE/UFD)
CLKOUT (Pin 1/Pin 19): Open-Drain Output Clock Signal
available to daisy-chain other controller ICs for additional
MOSFET driver stages/phases.
PLLLPF (Pin 2/Pin 20): The phase-locked loop’s lowpass
?lter is tied to this pin when synchronizing to an external
clock. Alternatively, tie this pin to GND, V IN or leave
?oating to select 250kHz, 530kHz or 400kHz switching
frequency.
I TH (Pin 3/Pin 1): Error Ampli?er Outputs and Switching
Regulator Compensation Points. The current comparator
trip point increases with this control voltage.
TRACK/SS (Pin 4/Pin 2): External Tracking and Soft-Start
Input. The LTC3834 regulates the V FB voltage to the smaller
of 0.8V or the voltage on the TRACK/SS pin. A internal 1μA
pull-up current source is connected to this pin. A capacitor
to ground at this pin sets the ramp time to ?nal regulated
output voltage. Alternatively, a resistor divider on another
voltage supply connected to this pin allows the LTC3834
output to track the other supply during start-up.
V FB (Pin 5/Pin 3): Receives the remotely sensed feed-
back voltage from an external resistive divider across
the output.
SGND (Pin 6/Pin 4): Small-Signal Ground. Must be routed
separately from high current grounds to the common (–)
terminals of the input capacitor.
PGND (Pin 7/Pin 5): Driver Power Ground. Connects to the
source of bottom (synchronous) N-channel MOSFET, anode
of the Schottky recti?er and the (–) terminal of C IN .
BG (Pin 8/Pin 6): High Current Gate Drive for Bottom
(Synchronous) N-Channel MOSFET. Voltage swing at this
pin is from ground to INTV CC .
INTV CC (Pin 9/Pin 7): Output of the Internal Linear Low
Dropout Regulator. The driver and control circuit are
powered from this voltage source. Must be decoupled
to power ground with a minimum of 4.7μF tantalum or
ceramic capacitor.
EXTV CC (Pin 10/Pin 8): External Power Input to an Internal
LDO Connected to INTV CC . This LDO supplies V CC power,
bypassing the internal LDO powered from V IN whenever
EXTV CC is higher than 4.7V. See EXTV CC Connection in
the Applications Information section. Do not exceed 10V
on this pin.
V IN (Pin 11/Pin 9): Main Supply Pin. A bypass capacitor
should be tied between this pin and the signal ground
pin.
SW (Pin 12/Pin 10): Switch Node Connections to Inductor.
Voltage swing at this pin is from a Schottky diode (external)
voltage drop below ground to V IN .
TG (Pin 13/Pin 11): High Current Gate Drive for Top
N-Channel MOSFET. These are the outputs of ?oating drivers
with a voltage swing equal to INTV CC – 0.5V superimposed
on the switch node voltage SW.
BOOST (Pin 14/Pin 12): Bootstrapped Supply to the
Topside Floating Driver. A capacitor is connected between
the BOOST and SW pins and a Schottky diode is tied
between the BOOST and INTV CC pins. Voltage swing at the
BOOST pin is from INTV CC to (V IN + INTV CC ).
RUN (Pin 15/Pin 13): Digital Run Control Input for
Controller. Forcing this pin below 0.7V shuts down all
controller functions, reducing the quiescent current that
the LTC3834 draws to approximately 4μA.
SENSE – (Pin 16/Pin 14): The (–) Input to the Differential
Current Comparator.
SENSE + (Pin 17/Pin 15): The (+) Input to the Differential
Current Comparator. The I TH pin voltage and controlled
offsets between the SENSE – and SENSE + pins in conjunc-
tion with R SENSE set the current trip threshold.
PGOOD (Pin 18/Pin 16): Open-Drain Logic Output. PGOOD
is pulled to ground when the voltage on the V FB pin is not
within ±10% of its set point.
PLLIN/MODE (Pin 19/Pin 17): External Synchronization
Input to Phase Detector and Forced Continuous Control
Input. When an external clock is applied to this pin, the
phase-locked loop will force the rising TG signal to be
synchronized with the rising edge of the external clock. In
this case, an R-C ?lter must be connected to the PLLLPF
pin. When not synchronizing to an external clock, this
input determines how the LTC3834 operates at light loads.
Pulling this pin below 0.7V selects Burst Mode operation.
Tying this pin to INTV CC forces continuous inductor current
3834fb
8
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| LTC3834IDHC-1#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 16-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
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