参数资料
型号: LTC3851EMSE-1#PBF
厂商: Linear Technology
文件页数: 16/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-MSOP
特色产品: Wide Input Voltage Range Synchronous Step-Down DC/DC Controller
标准包装: 37
PWM 型: 电流模式
输出数: 1
频率 - 最大: 790kHz
占空比: 99%
电源电压: 4 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-TFSOP(0.118",3.00mm 宽)裸露焊盘
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)
LTC3851-1
APPLICATIONS INFORMATION
V MASTER
TO
TK/SS
PIN
R3
R4
TO
V FB
PIN
R3
R4
V OUT
V MASTER
TO
TK/SS
PIN
R1
R2
TO
V FB
PIN
R3
R4
V OUT
38511 F04
(4a) Coincident Tracking Setup
(4b) Ratiometric Tracking Setup
Figure 4. Setup for Coincident and Ratiometric Tracking
The LDO can supply a peak current of 50mA and must
I
I
be bypassed to ground with a minimum of 2.2μF ceramic
TK/SS
0.8V
V FB
D1
D2
D3
38511 F05
+
EA
capacitor or low ESR electrolytic capacitor. No matter
what type of bulk capacitor is used, an additional 0.1μF
ceramic capacitor placed directly adjacent to the INTV CC
and GND pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers.
Figure 5. Equivalent Input Circuit of Error Ampli?er
is used to match the shifted common mode voltage. The
top two current sources are of the same amplitude. In the
coincident mode, the TK/SS voltage is substantially higher
than 0.8V at steady-state and effectively turns off D1. D2
and D3 will therefore conduct the same current and offer
tight matching between V FB and the internal precision
0.8V reference. In the ratiometric mode, however, TK/SS
equals 0.8V at steady-state. D1 will divert part of the bias
current to make V FB slightly lower than 0.8V.
Although this error is minimized by the exponential I-V
characteristic of the diode, it does impose a ?nite amount
of output voltage deviation. Furthermore, when the master
supply’s output experiences dynamic excursion (under
load transient, for example), the slave channel output will
be affected as well. For better output regulation, use the
coincident tracking mode instead of ratiometric.
INTV CC Regulator
The LTC3851-1 features a PMOS low dropout linear
regulator (LDO) that supplies power to INTV CC from the
V IN supply. INTV CC powers the gate drivers and much of
the LTC3851-1 ’s internal circuitry. The LDO regulates the
voltage at the INTV CC pin to 5V.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3851-1 to be
exceeded. The INTV CC current, which is dominated by the
gate charge current, is supplied by the 5V LDO.
Power dissipation for the IC in this case is highest and
is approximately equal to V IN ? I INTVCC . The gate charge
current is dependent on operating frequency as discussed
in the Ef?ciency Considerations section. The junction tem-
perature can be estimated by using the equations given in
Note 3 of the Electrical Characteristics. For example, the
LTC3851-1 INTV CC current is limited to less than 17mA
from a 36V supply in the GN package:
T J = 70°C + (17mA)(36V)(90°C/W) = 125°C
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode (MODE/PLLIN
= INTV CC ) at maximum V IN .
Topside MOSFET Driver Supply (C B , D B )
An external bootstrap capacitor C B connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor C B in the Functional Diagram is charged
though external diode D B from INTV CC when the SW pin
38511fa
16
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