参数资料
型号: LTC3851IGN#TRPBF
厂商: Linear Technology
文件页数: 19/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-SSOP
产品培训模块: LTC3851 Single Output DC/DC Switching Regulator Controller
特色产品: Wide Input Voltage Range Synchronous Step-Down DC/DC Controller
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 790kHz
占空比: 99%
电源电压: 4 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC3851
APPLICATIONS INFORMATION
Fault Conditions: Current Limit and Current Foldback
The LTC3851 includes current foldback to help limit load
current when the output is shorted to ground. If the
output falls below 40% of its nominal output level, the
maximum sense voltage is progressively lowered from
its maximum programmed value to about 25% of the that
value. Foldback current limiting is disabled during soft-
start or tracking. Under short-circuit conditions with very
low duty cycles, the LTC3851 will begin cycle skipping in
order to limit the short-circuit current. In this situation
the bottom MOSFET will be dissipating most of the power
but less than in normal operation. The short-circuit ripple
current is determined by the minimum on-time t ON(MIN)
of the LTC3851 (≈90ns), the input voltage and inductor
value:
Phase-Locked Loop and Frequency Synchronization
The LTC3851 has a phase-locked loop (PLL) comprised of
an internal voltage-controlled oscillator (V CO ) and a phase
detector. This allows the turn-on of the top MOSFET to
be locked to the rising edge of an external clock signal
applied to the MODE/PLLIN pin. This phase detector is
an edge sensitive digital type that provides zero degrees
phase shift between the external and internal oscillators.
This type of phase detector does not exhibit false lock to
harmonics of the external clock.
The output of the phase detector is a pair of complementary
current sources that charge or discharge the external ?lter
network connected to the FREQ/PLLFLTR pin. Note that
the LTC3851 can only be synchronized to an external clock
whose frequency is within range of the LTC3851’s internal
Δ I L(SC) = t ON(MIN) ?
V IN
L
V CO .This is guaranteed to be between 250kHz and 750kHz.
A simpli?ed block diagram is shown in Figure 8.
The resulting short-circuit current is:
If the external clock frequency is greater than the internal
– 1 Δ I L(SC)
I SC =
1/4MaxV SENSE
R SENSE
2
oscillator’s frequency, f OSC , then current is sunk con-
tinuously from the phase detector output, pulling down the
FREQ/PLLFLTR pin. When the external clock frequency is
Programming Switching Frequency
To set the switching frequency of the LTC3851, connect
a resistor, R FREQ , between FREQ/PLLFLTR and GND. The
relationship between the oscillator frequency and R FREQ
is shown in Figure 7. A 0.1μF bypass capacitor should be
connected in parallel with R FREQ .
750
700
less than f OSC , current is sourced continuously, pulling up
the FREQ/PLLFLTR pin. If the external and internal frequen-
cies are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to the
phase difference. The voltage on the FREQ/PLLFLTR pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the ?lter capacitor C LP holds the voltage.
650
600
550
500
2.7V
R LP
C LP
FREQ/PLLFLTR
450
400
EXTERNAL
MODE/
PLLIN
DIGITAL
PHASE/
350
OSCILLATOR
FREQUENCY
DETECTOR
VCO
300
250
20
40
60
80 100
120
140
160
R FREQ (k)
3851 F07
3851 F08
Figure 7. Relationship Between Oscillator Frequency
and Resistor Connected Between FREQ/PLLFLTR and GND
Figure 8. Phase-Locked Loop Block Diagram
3851fb
19
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