参数资料
型号: LTC3853EUJ#PBF
厂商: Linear Technology
文件页数: 9/36页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 40-QFN
产品培训模块: LTC3853 Multiphase Switching Controller
标准包装: 61
系列: PolyPhase®
PWM 型: 电流模式
输出数: 3
频率 - 最大: 830kHz
占空比: 98%
电源电压: 4.5 V ~ 24 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 40-WFQFN 裸露焊盘
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)

LTC3853
PIN FUNCTIONS
TG1, TG2, TG3 (Pins 32, 26, 19): Top Gate Driver Outputs.
These are the outputs of floating drivers with a voltage
swing equal to INTV CC superimposed on the switch nodes
voltages.
BOOST1, BOOST2, BOOST3 (Pins 33, 25, 18): Boosted
Floating Driver Supplies. The (+) terminal of the booststrap
capacitors connect to these pins. These pins swing from a
diode voltage drop below INTV CC up to V IN + INTV CC .
RUN1, RUN2, RUN3 (Pins 36, 35, 34): Run Control In-
puts. A voltage above 1.2V on any RUN pin turns on the
IC. However, forcing any of these pins below 1.2V causes
the IC to shut down the circuitry required for that particular
channel. There are 0.5μA pull-up currents for these pins.
Once the RUN pin rises above 1.2V, an additional 4.5μA
pull-up current is added to the pin.
MODE/PLLIN (Pin 37): Force Continuous Mode, Burst
Mode, or Pulse Skip Mode Selection Pin and External
Synchronization Input to Phase Detector Pin. Connect
this pin to SGND to force all channels into the continuous
mode of operation. Connect to INTV CC to enable pulse
skip mode of operation. Leaving the pin floating will en-
able Burst Mode operation. A clock on the pin will force
the controller into continuous mode of operation and
synchronize the internal oscillator.
FREQ/PLLFLTR (Pin 38): The phase-locked loop’s low-
pass filter is tied to this pin. Alternatively, this pin can
be driven with a DC voltage to vary the frequency of the
internal oscillator.
I LIM (Pin 39): Current Comparator Sense Voltage Range
Inputs. This pin is to be programmed to SGND, FLOAT or
INTV CC to set the maximum current sense threshold to
three different levels.
TK/SS1, TK/SS2, TK/SS3 (Pins 40, 1, 2): Output Voltage
Tracking and Soft-Start Inputs. When one particular channel
is configured to be the master, a capacitor to ground at
this pin sets the ramp rate for the master channel’s output
voltage. When the channel is configured to be the slave,
the V FB voltage of the master channel is reproduced by a
resistor divider and applied to this pin. Internal soft-start
currents of 1.3μA are charging the soft-start capacitors.
In dual output (2 + 1) mode, TK/SS1 and TK/SS2 need to
be shorted externally.
PGND (Exposed Pad Pin 41): Power Ground. Connect this
pin close to the sources of the bottom N-channel MOSFETs,
the (–) terminal of C VCC and the (–) terminal of C IN .
3853fa
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相关代理商/技术参数
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LTC3854EDDB#TRMPBF 功能描述:IC REG CTRLR BUCK PWM CM 12-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)
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