参数资料
型号: LTC3854IDDB#TRPBF
厂商: Linear Technology
文件页数: 7/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 12-DFN
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 440kHz
占空比: 98%
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 12-WFDFN 裸露焊盘
包装: 带卷 (TR)
LTC3854
PIN FUNCTIONS
FB (Pin 1): Error Amplifier Feedback Input. This pin receives
the remotely-sensed feedback voltage from an external
resistor divider across the output.
ITH (Pin 2): Error Amplifier Output and Switching Regulator
Compensation Point. The current comparator trip point
increases with this control voltage.
RUN/SS (Pin 3): Run Control, Soft-Start. If the voltage
on this pin is held below 0.4V, the part is in shutdown. If
the pin is released the capacitance to ground at this pin
sets the soft-start ramp rate. An internal 1.25μA soft-start
current is always charging this pin.
BOOST (Pin 4): Bootstrapped Supply to the Top Side Float-
ing Driver. A low ESR capacitor is connected between the
BOOST and SW pins and an external Schottky diode is tied
between the BOOST and INTV CC pins. The voltage swing
on the BOOST pin is INTV CC to (V IN + INTV CC ).
TG (Pin 5): High Current Gate Drive for Top N-channel
MOSFET. This is the output of floating driver with a volt-
age swing equal to INTV CC superimposed on the switch
node voltage.
SW (Pin 6): Switch Node Connection to Inductor. The volt-
age swing on this pin is from a Schottky diode (external)
forward voltage (when this diode is added across the N-
channel synchronous MOSFET) below ground to V IN .
GND (Pin 7): Small Signal and Power Ground. This is
the high current ground for the gate driver. The internal
signal ground is Kelvin connected to this pin for noise
suppression.
BG (Pin 8): High Current Gate Drive for Bottom (Synchro-
nous) N-channel MOSFET. The voltage swing at this pin is
from ground to INTV CC .
INTV CC (Pin 9): Output of the Internal 5V Low Dropout
Regulator. The driver and control circuits are powered
from this voltage. Must be decoupled to power ground
with a minimum of 2.2μF low ESR ceramic capacitor (X5R
or better).
V IN (Pin 10): Main Supply Pin. A bypass capacitor should
be tied between this pin and the signal ground pin.
SENSE – (Pin 11): The (–) Input to the Differential Current
Comparator.
SENSE + (Pin 12): The (+) Input to the Differential Current
Comparator. The ITH pin voltage and controlled offsets
between the SENSE – and SENSE + pins in conjunction with
R SENSE (or R DCR ) set the peak current trip threshold.
SGND (Exposed Pad Pin 13): The exposed pad must be
soldered to PCB ground for electrical contact and rated
thermal performance.
3854fb
7
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