参数资料
型号: LTC3856EFE#PBF
厂商: Linear Technology
文件页数: 23/40页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38TFSOP
标准包装: 50
系列: PolyPhase®
PWM 型: 电流模式
输出数: 1
频率 - 最大: 850kHz
占空比: 94%
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 38-TFSOP (0.173",4.40mm 宽)裸露焊盘
包装: 管件
LTC3856
APPLICATIONS INFORMATION
V OUT k
V IN
= where k = 1 2 ,..., N – 1
V OUT 2 k – 1
V IN
= where k = 1 2 ,..., N
Theterm(1+δ)isgenerallygivenforaMOSFETinthe
form of a normalized R DS(ON) vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes conduct during the dead
time between the conduction of the two large power
MOSFETs. This prevents the body diode of the bottom
MOSFET from turning on, storing charge during the
dead time and requiring a reverse-recovery period which
could cost as much as several percent in efficiency. A 2A
to 8A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition loss
due to their larger junction capacitance. A Schottky diode
in parallel with the bottom FET may also provide a modest
improvement in Burst Mode efficiency.
C IN and C OUT Selection
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V OUT /
V IN . A low ESR input capacitor sized for the maximum
RMS current must be used. The details of a close form
equation can be found in Application Note 77. Figure 10
shows the input capacitor ripple current for different phase
configurations with the output voltage fixed and input volt-
age varied. The input ripple current is normalized against
the DC output current. The graph can be used in place of
tedious calculations. The minimum input ripple current
can be achieved when the product of phase number and
0.6
0.5
0.4
0.3
0.2
0.1
output voltage, N(V OUT ), is approximately equal to the
input voltage, V IN , or:
N
So, the phase number can be chosen to minimize the input
capacitor size for the given input and output voltages. In
the graph of Figure 10, the local maximum input RMS
capacitor currents are reached when:
N
These worst-case conditions are commonly used for design
because even significant deviations do not offer much relief.
Note that capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose
a capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. Always consult the
capacitor manufacturer if there is any question.
The Figure 10 graph shows that the peak RMS input
current is reduced linearly, inversely proportional to the
number N of stages used. It is important to note that the
efficiency loss is proportional to the input RMS current
squared and therefore a 3-stage implementation results
in 90% less power loss when compared to a single-phase
design. Battery/input protection fuse resistance (if used),
PC board trace and connector resistance losses are also
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
12-PHASE
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
DUTY FACTOR (V OUT /V IN )
3856 F10
Figure 10. Normalized Input RMS Ripple Current
vs Duty Factor for One to Six Output Stages
3856f
  
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