参数资料
型号: LTC3862HGN#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO24
封装: 0.150 INCH, LEAD FREE, PLASTIC, SSOP-24
文件页数: 15/40页
文件大小: 613K
代理商: LTC3862HGN#PBF
LTC3862
22
3862fb
The SENSE+ and SENSEPins
The SENSE+ and SENSEpins are high impedance inputs
to the CMOS current comparators for each channel.
Nominally, there is no DC current into or out of these
pins. There are ESD protection diodes connected from
these pins to SGND, although even at hot temperature the
leakage current into the SENSE+ and SENSEpins should
be less than 1μA.
Since the LTC3862 contains leading edge blanking, an
external RC lter is not required for proper operation.
However, if an external lter is used, the lter components
should be placed close to the SENSE+ and SENSEpins on
the IC, as shown in Figure 15. The positive and negative
sense node traces should then run parallel to each other
to a Kelvin connection underneath the sense resistor, as
shown in Figure 16. Sensing current elsewhere on the
board can add parasitic inductance and capacitance to
the current sense element, degrading the information
at the sense pins and making the programmed current
limit unpredictable. Avoid the temptation to connect the
SENSEline to the ground plane using a PCB via; this
could result in unpredictable behavior.
The sense resistor should be connected to the source
of the power MOSFET and the ground node using short,
wide PCB traces, as shown in Figure 16. Ideally, the bot-
tom terminal of the sense resistors will be immediately
MOSFET SOURCE
TO SENSE
FILTER NEXT
TO CONTROLLER
RSENSE
GND
3862 F16
Figure 16. Connecting the SENSE+ and SENSETraces to the
Sense Resistor Using a Kelvin Connection
adjacent to the negative terminal of the output capacitor,
since this path is a part of the high di/dt loop formed by
the switch, boost diode, output capacitor and sense resis-
tor. Placement of the inductors is less critical, since the
current in the inductors is a triangle waveform.
Checking the Load Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, VOUT shifts by an
amount equal to
ΔILOAD (ESR), where ESR is the effective
series resistance of COUT. ΔILOAD also begins to charge or
discharge COUT, generating the feedback error signal that
forces the regulator to adapt to the current change and
return VOUT to its steady-state value. During this recovery
time VOUT can be monitored for excessive overshoot or
ringing, which would indicate a stability problem.
The availability of the ITH pin not only allows optimization
of control loop behavior but also provides a DC-coupled
and AC-ltered closed-loop response test point. The DC
step, rise time and settling at this test point truly reects the
closed-loop response. Assuming a predominantly second
order system, phase margin and/or damping factor can be
estimated using the percentage of overshoot seen at this
pin. The bandwidth can also be estimated by examining
the rise time at the pin.
OPERATION
SENSE
SENSE+
LTC3862
GATE
VOUT
RSENSE
3862 F15
FILTER COMPONENTS
PLACED NEAR
SENSE PINS
VIN
PGND
INTVCC
VIN
Figure 15. Proper Current Sense Filter Component Placement
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