参数资料
型号: LTC3865IFE#TRPBF
厂商: Linear Technology
文件页数: 23/38页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38TSSOP
标准包装: 2,000
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 880kHz
占空比: 95%
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 38-TFSOP (0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
LTC3865/LTC3865-1
APPLICATIONS INFORMATION
?? ( V OUT )( V IN – V OUT ) ??
I MAX
C IN Re quired I RMS ≈
Δ V OUT RIPPLE ? ESR +
≈ I
V OUT = 0 . 6 V ? ? 1 + B ?
maximumRMScurrentofonechannelmustbeused.The
maximum RMS capacitor current is given by:
1 / 2
V IN
This formula has a maximum at V IN = 2V OUT , where
I RMS = I OUT /2. This simple worst-case condition is com-
monly used for design because even signi?cant deviations
do not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3865, ceramic capacitors
can also be used for C IN . Always consult the manufacturer
if there is any question.
The bene?t of the LTC3865/LTC3865-1 2-phase operation
can be calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap of
current pulses required through the input capacitor’s ESR.
This is why the input capacitor’s requirement calculated
above for the worst-case controller is adequate for the dual
controller design. Also, the input protection fuse resistance,
battery resistance, and PC board trace resistance losses
are also reduced due to the reduced peak currents in a
2-phase system. The overall bene?t of a multiphase design
will only be fully realized when the source impedance of the
The selection of C OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satis?ed, the capacitance is adequate for ?ltering. The
output ripple ( Δ V OUT ) is approximated by:
? 1 ?
?
? 8 fC OUT ?
where f is the operating frequency, C OUT is the output
capacitance and I RIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I RIPPLE increases with input voltage.
Setting Output Voltage
The LTC3865/LTC3865-1 output voltages are each set
by the voltages at VID pins. Each of the VID pins can be
?oated, or INTV CC or grounded, depending on what preset
voltages are needed at the output (Table 1).
If the desired output voltage is not one of the preset
values, select 0.6V and use 1% resistors to divide V OUT ,
as shown in Figure 9. The regulated output voltage is
determined by:
? R ?
? R A ?
To improve the frequency response, a feed-forward ca-
pacitor, C FF , may be used. Great care should be taken to
route the V OSENSE line away from noise sources, such as
the inductor or the SW line.
V OUT
power supply/battery is included in the ef?ciency testing.
The sources of the top MOSFETs should be placed within
1/2 LTC3865
R B
C FF
1cm of each other and share a common C IN (s). Separating
the sources and C IN may produce undesirable voltage and
current resonances at V IN .
A small (0.1μF to 1μF) bypass capacitor between the chip V IN
V OSENSE
R A
3865 F09
Figure 9. Setting Output Voltage
pin and ground, placed close to the LTC3865/LTC3865-1,
is also suggested. A 2.2Ω to 10Ω resistor placed between
C IN (C1) and the V IN pin provides further isolation between
the two channels.
3865fb
23
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LTC3865IUH-1#TRPBF 功能描述:IC REG CTRLR BUCK PWM CM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)
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