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参数资料
| 型号： | LTC3872ETS8#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 650 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封装： | 1 MM HEIGHT, LEAD FREE, PLASTIC, MO-193, TSOT-23, 8 PIN |
| 文件页数： | 7/22页 |
| 文件大小： | 245K |
| 代理商： | LTC3872ETS8#PBF |
LTC3872
15
3872fb
And so the inductor value is:
L
=
VIN(MIN)
IL f
DMAX =
3.3V
1.3A 550kHz
0.39
= 1.8H
The component chosen is a 2.2H inductor made by
Sumida (part number CEP125-H 1ROMH).
3. Assuming a MOSFET junction temperature of 125°C,
the room temperature MOSFET RDS(ON) should be less
than:
RDS(ON) ≤ VSENSE(MAX)
1– DMAX
1
+ χ
2
IO(MAX) ρT
= 0.175V
1– 0.39
1
+
0.4
2
2A 1.5
≈ 30m
The MOSFET used was the Si3460, which has a maximum
RDS(ON) of 27mΩ at 4.5V VGS, a BVDSS of greater than
30V, and a gate charge of 13.5nC at 4.5V VGS.
4. The diode for this design must handle a maximum DC
output current of 2A and be rated for a minimum reverse
voltage of VOUT, or 5V. A 25A, 15V diode from On Semi-
conductor (MBRB2515L) was chosen for its high power
dissipation capability.
5. The output capacitor usually consists of a lower valued,
low ESR ceramic.
6. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design two 22F Taiyo Yuden ceramic
capacitors (JMK325BJ226MM) is required (the input
and return lead lengths are kept to a few inches. As with
the output node, check the input ripple with a single
oscilloscope probe connected across the input capacitor
terminals.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3872. These items are illustrated graphically in
the layout diagram in Figure 8. Check the following in
your layout:
1. TheSchottkydiodeshouldbecloselyconnectedbetween
the output capacitor and the drain of the external MOSFET.
2. The input decoupling capacitor (0.1F) should be con-
nected closely between VIN and GND.
3. The trace from SW to the switch point should be kept
short.
4. Keep the switching node NGATE away from sensitive
small signal nodes.
5. The VFB pin should connect directly to the feedback
resistors. The resistive divider R1 and R2 must be con-
nected between the (+) plate of COUT and signal ground.
Figure 8. LTC3872 Layout Diagram (See PC Board Layout Checklist)
IPRG
ITH
VFB
GND
SW
RUN/SS
VIN
NGATE
LTC3872
3872 F08
R1
R2
RITH
CIN
COUT
VOUT
VIN
CITH
+
D1
M1
L1
BOLD LINES INDICATE HIGH CURRENT PATHS
applicaTions inForMaTion
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