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| 型号： | LTC3876EUHF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 26/48页 |
| 文件大小： | 0K |
| 描述： | IC CTLR DC/DC DDR DUAL 38-QFN |
| 标准包装： | 52 |
| 应用： | 控制器，DDR，DDR2，DDR3 |
| 输入电压： | 4.5 V ~ 38 V |
| 输出数： | 2 |
| 输出电压： | 可调 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-WFQFN 裸露焊盘 |
| 供应商设备封装： | 38-QFN（5x7） |
| 包装： | 管件 |
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LTC3876
APPLICATIONS INFORMATION
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount pack-
ages. Special polymer capacitors offer very low ESR but
have lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
but can have a high voltage coefficient and audible piezo-
electric effects. The high-Q of ceramic capacitors with trace
inductance can also lead to significant ringing. When used
as input capacitors, care must be taken to ensure that ring-
ing from inrush currents and switching does not pose an
overvoltage hazard to the power switches and controller.
For high switching frequencies, reducing output ripple and
better EMI filtering may require small value capacitors that
have low ESL (and correspondingly higher self-resonant
frequencies) to be placed in parallel with larger value
capacitors that have higher ESL. This will ensure good
noise and EMI filtering in the entire frequency spectrum
of interest. Even though ceramic capacitors generally
have good high frequency performance, small ceramic
capacitors may still have to be parallel connected with
large ones to optimize performance.
High performance through-hole capacitors may also be
used, but an additional ceramic capacitor in parallel is
recommended to reduce the effect of their lead inductance.
Remember also to place high frequency decoupling capaci-
tors as close as possible to the power pins of the load.
Top MOSFET Driver Supply (C B , D B )
An external bootstrap capacitor, C B , connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. This capacitor is charged through diode D B from
DRV CC when the switch node is low. When the top MOSFET
rises to approximately V IN + INTV CC . The boost capacitor
needs to store approximately 100 times the gate charge
required by the top MOSFET. In most applications a 0.1μF
to 0.47μF, X5R or X7R dielectric capacitor is adequate. It
is recommended that the BOOST capacitor be no larger
than 10% of the DRV CC capacitor, C DRVCC , to ensure that
the C DRVCC can supply the upper MOSFET gate charge
and BOOST capacitor under all operating conditions. Vari-
able frequency in response to load steps offers superior
transient performance but requires higher instantaneous
gate drive. Gate charge demands are greatest in high
frequency low duty factor applications under high load
steps and at start-up.
DRV CC Regulator and EXTV CC Power
The LTC3876 features a PMOS low dropout (LDO) linear
regulator that supplies power to DRV CC from the V IN supply.
The LDO regulates its output at the DRV CC1 pin to 5.3V.
The LDO can supply a maximum current of 100mA and
must be bypassed to ground with a minimum of 4.7μF
ceramic capacitor. Good bypassing is needed to supply
the high transient currents required by the MOSFET gate
drivers and to minimize interaction between the channels.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3876 to be
exceeded, especially if the LDO is active and provides
DRV CC . Power dissipation for the IC in this case is high-
est and is approximately equal to V IN ? I DRVCC . The gate
charge current is dependent on operating frequency as
discussed in the Efficiency Considerations section. The
junction temperature can be estimated by using the equa-
tion given in Note 2 of the Electrical Characteristics. For
example, when using the LDO, LTC3876’s DRV CC current
is limited to less than 52mA from a 38V supply at T A =
70°C in the FE package:
T J = 70°C + (52mA)(38V)(28°C/W) = 125°C
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode at maximum V IN .
turns on, the switch node rises to V IN and the BOOST pin
3876f
26
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