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| 型号： | LTC3880EUJ#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 45/112页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 40-QFN |
| 软件下载： | LTpowerPlay™ |
| 标准包装： | 61 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 4.5 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3880/LTC3880-1
APPLICATIONS INFORMATION
typically 4.5V for logic level devices. The UVLO on INTV CC
(EXTV CC ) is set to approximately 4V. Both a LTC3880 and
LTC3880-1 are valid for this configuration.
TOPSIDE MOSFET DRIVER SUPPLY (C B , D B )
External bootstrap capacitors C B connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C B in the Block Diagram is charged though
external diode D B from INTV CC when the SW pin is low.
When one of the topside MOSFETs is to be turned on,
the driver places the C B voltage across the gate source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to V IN and the BOOST pin follows. With the topside
MOSFET on, the boost voltage is above the input supply:
V BOOST = V IN + V INTVCC . The value of the boost capacitor
C B needs to be 100 times that of the total input capa-
citance of the topside MOSFET(s). The reverse break-
down of the external Schottky diode must be greater
than V IN(MAX) . When adjusting the gate drive level, the
final arbiter is the total input current for the regulator. If
a change is made and the input current decreases, then
the efficiency has improved. If there is no change in input
current, then there is no change in efficiency.
PWM jitter has been observed in some designs operating
at higher V IN /V OUT ratios. This jitter does not substantially
affect the circuit accuracy. Referring to Figure 24, PWM
jitter can be removed by inserting a series resistor with a
value of 1Ω to 5Ω between the cathode of the diode and
the BOOST n pin. A resistor case size of 0603 or larger is
recommended to reduce ESL and achieve the best results.
V IN V IN
BOOST
0.2μF
TGATE
LTC3880
LTC3880-1
SW
INTV CC
10μF
BGATE
PGND
3880 F24
Figure 24. Boost Circuit to Minimize PWM Jitter
UNDERVOLTAGE LOCKOUT
The LTC3880 is initialized by an internal threshold-based
UVLO where V IN must be approximately 4V and INTV CC /
EXTV CC , V DD33 , V DD25 must be within approximately 20%
of the regulated values. In addition, V DD33 must be within
approximately 7% of the targeted value before the RUN
pin is released. After the part has initialized, an additional
comparator monitors V IN . The VIN_ON threshold must
be exceeded before the power sequencing can begin.
When V IN drops below the VIN_OFF threshold, the RUN
pins will be pulled low and V IN must increase above the
VIN_ON threshold before the controller will restart. The
normal start-up sequence will be allowed after the VIN_ON
threshold is crossed.
It is possible to program the contents of the NVM in the
application if the V DD33 supply is externally driven. This
will activate the digital portion of the LTC3880 without
engaging the high voltage sections. PMBus communica-
tions are valid in this supply configuration. If V IN has not
been applied to the LTC3880, bit 3 (NVM Not Initialized)
in MFR_COMMON will be asserted low. If this condition is
detected, the part will only respond to addresses 5A and 5B.
To initialize the part issue the following set of commands:
global address 0x5B command 0xBD data 0x2B followed
by global address 5B command 0xBD and data 0xC4. The
part will now respond to the correct address. Configure
the part as desired then issue a STORE_USER_ALL. When
V IN is applied a MFR_RESET command must be issued to
allow the PWM to be enabled and valid ADC conversions
to be read.
C IN AND C OUT SELECTION
The selection of C IN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V OUT )(I OUT ) product needs to be used in the
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
3880fb
For more information www.linear.com/LTC3880
45
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相关代理商/技术参数 |
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| LTC3880IUJ#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ-1#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ-1#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
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