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| 型号： | LTC3880EUJ#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 53/112页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 40-QFN |
| 软件下载： | LTpowerPlay™ |
| 标准包装： | 61 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 4.5 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3880/LTC3880-1
APPLICATIONS INFORMATION
to 80% of full-load current having a rise time of 1μs to
10μs will produce output voltage and I TH pin waveforms
that will give a sense of the overall loop stability without
breaking the feedback loop. Placing a power MOSFET with
a resistor to ground directly across the output capacitor
and driving the gate with an appropriate signal generator
is a practical way to produce to a load step. The MOSFET
+ R SERIES will produce output currents approximately
equal to V OUT /R SERIES . R SERIES values from 0.1Ω to 2Ω
are valid depending on the current limit settings and the
programmed output voltage. The initial output voltage
step resulting from the step change in output current may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This
is why it is better to look at the I TH pin signal which is in
the feedback loop and is the filtered and compensated
control loop response. The gain of the loop will be in-
creased by increasing R C and the bandwidth of the loop
will be increased by decreasing C C . If R C is increased by
the same factor that C C is decreased, the zero frequency
will be kept the same, thereby keeping the phase shift the
same in the most critical frequency range of the feedback
loop. The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C OUT , causing a rapid drop in V OUT . No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C LOAD to C OUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 ? C LOAD . Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
PC BOARD LAYOUT CHECKLIST
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 25. Figure 26 illustrates the
current waveforms present in the various branches of
the 2-phase synchronous regulators operating in the
continuous mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M2 located
within 1 cm of each other with a common drain con-
nection at C IN ? Do not attempt to split the input de-
coupling for the two channels as it can cause a large
resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return of
C INTVCC must return to the combined C OUT (–) terminals.
The I TH traces should be as short as possible. The path
formed by the top N-channel MOSFET, Schottky diode
and the C IN capacitor should have short leads and PC
trace lengths. The output capacitor (–) terminals should
be connected as close as possible to the (–) terminals
of the input capacitor by placing the capacitors next to
each other and away from the Schottky loop described
above.
3. Does the LTC3880 V SENSE lines equal V OUT ? V OUT0 is
differential. V OUT1 should reference the SGND (Pin 41)
to the Load 1 ground.
4. Are the I SENSE+ and I SENSE– leads routed together with
minimum PC trace spacing? The filter capacitor between
I SENSE+ and I SENSE– should be as close as possible to
3880fb
For more information www.linear.com/LTC3880
53
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相关代理商/技术参数 |
参数描述 |
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| LTC3880IUJ#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ-1#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3880IUJ-1#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3883EUH#PBF | 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN 制造商:Linear Technology 功能描述:BUCK CNTRL 24V 1MHZ 0.5/5.5V 32QFN 制造商:Linear Technology 功能描述:BUCK, CNTRL, 24V, 1MHZ, 0.5/5.5V, 32QFN 制造商:Linear Technology 功能描述:PWM CONTROLLER, BUCK, 1MHZ, 24V, QFN-32, Input Voltage:24V, Output Voltage:5.5V, Output Current:30A, Supply Voltage Min:4.5V, Supply Voltage Max:24V, Digital IC Case Style:QFN, No. of Pins:32, Frequency:1MHz, MSL:MSL 1 - Unlimited , RoHS Compliant: Yes 制造商:Linear Technology 功能描述:DP-SWREG/Controller, Digitally Programmable, Multiphase Step-Down DC/DC Controll |
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