参数资料
型号: LTC3880IUJ#TRPBF
厂商: Linear Technology
文件页数: 12/112页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 40-QFN
软件下载: LTpowerPlay™
标准包装: 2,000
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 1MHz
电源电压: 4.5 V ~ 24 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3880/LTC3880-1
TYPICAL PERFORMANCE CHARACTERISTICS
CURRENT 10
CURRENT 10
25
20
15
10
DC Output Current Matching in a
2-Phase System (LTC3880)
5A/DIV
0
Dynamic Current Sharing During a
Load Transient in a 4-Phase System
5A/DIV
0
Dynamic Current Sharing During a
Load Transient in a 4-Phase System
5μs/DIV
3880 G29
5μs/DIV
3880 G30
5
0
0
5
10
15
20
25
30
CHAN 0
CHAN 1
35 40
TOTAL CURRENT (A)
3880 G28
PIN FUNCTIONS
V SENSE0+ (Pin 1): Channel 0 Positive Voltage Sense
Input.
V SENSE0– (Pin 2): Channel 0 Negative Voltage Sense
Input.
I TH0 /I TH1 (Pin 5/Pin 26 ): Current Control Threshold and
Error Amplifier Compensation Nodes. Each associated
channel’s current comparator tripping threshold increases
with its I TH voltage.
I SENSE0+ /I SENSE1+ (Pins 6/Pin 3): Current Sense Compara-
tor Inputs. The (+) inputs to the current comparators are
normally connected to DCR sensing networks or current
sensing resistors.
I SENSE0– /I SENSE1– (Pin 7/Pin 4): Current Sense Comparator
Inputs. The (–) inputs are connected to the low side of the
current sense element.
SYNC (Pin 8): External Clock Synchronization Input and
Open-Drain Output Pin. If an external clock is present at
this pin, the switching frequency will be synchronized to
the external clock. If clock master mode is enabled, this
pin will pull low at the switching frequency with a 500ns
pulse to ground. A resistor pull up to 3.3V is required in
the application if the LTC3880 is the master.
SCL (Pin 9): Serial Bus Clock Input. Open-drain output,
can hold the output low if clock stretching is enabled. A
pull-up resistor to 3.3V is required in the application.
SDA (Pin 10): Serial Bus Data Input and Output. A pull-up
resistor to 3.3V is required in the application.
ALERT (Pin 11): Open-Drain Digital Output. Connect the
SMBALERT signal to this pin. A pull-up resistor to 3.3V
is required in the application.
GPIO0 / GPIO1 (Pin 12/Pin 13): Digital Programmable
General Purpose Inputs and Outputs. Open-drain output.
A pull-up resistor to 3.3V is required in the application.
RUN0/RUN1 (Pin 14/Pin 15): Enable Run Input. Logic high
on these pins enables the controller. Open-drain output
holds the pin low until the LTC3880 is out of reset. A pull-
up resistor to 3.3V is required in the application.
ASEL (Pin 16): Serial Bus Address Configuration Input.
Connect a ±1% resistor divider between the chip V DD25
ASEL and SGND in order to select the 4LSBs of the se-
rial bus interface address. A resistor divider on ASEL is
recommended if there are more than 1 LTC3880 on the
same board to assure the user can independently program
each IC. If the pin is left open, the IC will use the value
programmed in the NVM. Minimize capacitance when the
pin is open to assure accurate detection of the pin state.
3880fb
12
For more information www.linear.com/LTC3880
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LTC3883EUH#TRPBF 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN 制造商:Linear Technology 功能描述:DP-SWREG/Controller, Digitally Programmable, Multiphase Step-Down DC/DC Controll
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