参数资料
型号: LTC4067EDE#PBF
厂商: Linear Technology
文件页数: 16/20页
文件大小: 0K
描述: IC USB POWER MANAGER 12-DFN
标准包装: 91
功能: 电源管理
电池化学: 锂离子(Li-Ion)、锂聚合物(Li-Pol)
电源电压: 5.5V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
供应商设备封装: 12-DFN(4x3)
包装: 管件
LTC4067
APPLICATIO S I FOR ATIO
NTC thermistor, R COLD , increases to 2.82 times the value
or R NOM . (For a Vishay NTHS0603N02N1002 thermistor
Table 3 illustrates the four possible states of the ? C H ? ? R ? G
pin when the battery charger is active.
this value is 28.2k which corresponds to a temperature of
approximately 0°C). The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscillation
Table 3. ? C ? H ? R ? G Output Pin
MODULATION
(BLINK)
about the trip points.
Fault Conditions
The ? C ? H ? R ? G pin is used to signal two distinct fault condi-
tions: NTC faults and bad battery faults. Both of these
STATUS
Charging
I BAT < I CC-CHG /10
NTC Fault
Bad Battery
FREQUENCY
0Hz
0Hz
35kHz
35kHz
FREQUENCY
0Hz (Lo-Z)
0Hz (Hi-Z)
1.5Hz at 50%
6.1Hz at 50%
DUTY CYCLE
100%
0%
4.7% to 95.3%
9.4% to 90.6%
conditions are signaled at the ? C ? H ? R ? G pin with a series of
serrated open-drain pull-down pulses that are intended
to produce a visible “blinking” at an LED tied to this pin
as well as to produce a pulse train that is detectable to a
microprocessor input connected to this pin. The serrated
pulses are described with the aid of Figure 3, assuming
that the ? C ? H ? R ? G pin is connected to a positive rail with a
resistive pull-up. When an NTC fault condition is detected
during a normal charge cycle, the ? C ? H ? R ? G pin immediately
goes from a strong open-drain pull down to a high-im-
pedance state that pulses on for 1.4μs and then off at a
35kHz rate. This signal is further modulated by a 1.5Hz
blink frequency that reverses from pulsing high-to-low to
pulsing low-to-high.
A bad battery fault has a 2.8μs pulse at the same rate that
is modulated by a 6Hz blink frequency. As the ? C ? H ? R ? G pin
immediately changes state upon entering a failure mode, a
microprocessor observing this pin detects the fault condi-
tion within 29μs of the failure occurring, by measuring the
pulse width. Furthermore the blink frequency is visually
detected by hooking this signal up to an LED.
When connecting a microprocessor with a positive logic
suppy that is different than the LED anode, a diode must
be inserted in series with the microcontroller input so as
to aviod the condition where the LED may inadvertantly
power up the microcontroller. A circuit that allows visual
fault and/or charge status as well as providing a safe
V (CHRG)
T S
PW = 1.3 μ s OR
2.7 μ s
PW = 27.7 μ s (NTC FAULT)
26.3 μ s (BAD BAT)
T S = 667ms/2 (NTC FAULT)
167ms/2 (BAD BAT)
microcontroller interface is shown in Figure 4.
VLOGIC
OUT
TO MICRO
LTC4067
CHRG
NORMAL
CHARGING
FAULT
CONDITION
Figure 3
4067 F03
4067 F04
Figure 4. ? C ? H ? R ? G Pin Connection to Drive a Microcontroller at the
Same Time as Providing a Visual Fault and/or Charge Status
4067f
16
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