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参数资料
| 型号： | LTC4069EDC-4.4#TRMPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6 |
| 封装： | 2 X 2 MM, LEAD FREE, PLASTIC, MO-229WCCD-2, DFN-6 |
| 文件页数： | 7/16页 |
| 文件大小： | 192K |
| 代理商： | LTC4069EDC-4.4#TRMPBF |
15
LTC4069-4.4
406944f
2.00
±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.38
± 0.05
BOTTOM VIEW—EXPOSED PAD
0.56
± 0.05
(2 SIDES)
0.75
±0.05
R = 0.115
TYP
1.37
±0.05
(2 SIDES)
1
3
6
4
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN 1103
0.25
± 0.05
1.42
±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61
±0.05
(2 SIDES)
1.15
±0.05
0.675
±0.05
2.50
±0.05
PACKAGE
OUTLINE
0.25
± 0.05
0.50 BSC
PIN 1
CHAMFER OF
EXPOSED PAD
U
PACKAGE DESCRIPTIO
DC Package
6-Lead Plastic DFN (2mm
× 2mm)
(Reference LTC DWG # 05-08-1703)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
R
RR
k
NOM
COLD
HOT
=
=
3 266 0 5325
10
2 816 0
..
.
.44086
3 266 0 5325
88 887
()
=
..
., .
kk is
%
.
.
the nearest
value
Rk
1
10
0 5325
326
1 =
66 0 5325
2 816 0 4086
0 4086
()
.
,%
.
= 604 604
1
is the nearest
value
NTC Trip Point Error
When a 1% resistor is used for RHOT, the major error in the
40
°C trip point is determined by the tolerance of the NTC
thermistor. A typical 100k NTC thermistor has
±10%
tolerance. By looking up the temperature coefficient of the
thermistor at 40
°C, the tolerance error can be calculated in
degrees
centigrade.
Consider
the
Vishay
NTHS0603N01N1003J thermistor, which has a tempera-
ture coefficient of –4%/
°C at 40°C. Dividing the tolerance
by the temperature coefficient,
±5%/(4%/°C) = ±1.25°C,
gives the temperature error of the hot trip point.
The cold trip point error depends on the tolerance of the
NTC thermistor and the degree to which the ratio of its
value at 0
°C and its value at 40°C varies from 6.14 to 1.
Therefore, the cold trip point error can be calculated using
the tolerance, TOL, the temperature coefficient of the
thermistor at 0
°C, TC (in %/°C), the value of the thermistor
at 0
°C, RCOLD, and the value of the thermistor at 40°C,
RHOT. The formula is:
Temperature Error C
TOL
R
COLD
HOT
()
.
°=
+
1
614
1
100
TC
For example, the Vishay NTHS0603N01N1003J thermistor
with a tolerance of
±5%, TC of –5%/°C and RCOLD/RHOT of
6.13, has a cold trip point error of:
Temperature Error C
()
.
°=
+
10 05
614
613 1
100
5
., .
=
°°
095
105
CC
APPLICATIO S I FOR ATIO
WU
UU
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