LTC4088-1
40881fa
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency(35kHz)toindicatethetwopossiblefaults.While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
Whenchargingbegins,CHRGispulledlowandremainslow
forthedurationofanormalchargecycle.Whenchargingis
complete, as determined by the criteria set by the C/X pin,
the CHRG pin is released (Hi-Z). The CHRG pin does not
respond to the C/X threshold if the LTC4088-1 is in VBUS
current limit. This prevents false end of charge indications
due to insufficient power available to the battery charger. If
a fault occurs while charging, the pin is switched at 35kHz.
Whileswitching,itsdutycycleismodulatedbetweenahigh
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. `C`H`R`G Signal
STATUS
FREQUENCY
MODULATION
(BLINK) FREQUENCY
DUTY
CYCLES
Charging
0Hz
0Hz (Low Z)
100%
IBAT < C/X
0Hz
0Hz (Hi-Z)
0%
NTC Fault
35kHz
1.5Hz at 50%
6.25% or 93.75%
Bad Battery
35kHz
6.1Hz at 50%
12.5% or 87.5%
Notice that an NTC fault is represented by a 35kHz pulse
trainwhosedutycycletogglesbetween6.25%and93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pingivesthebatteryfaultindication.Forthisfault,ahuman
would easily recognize the frantic 6.1Hz “fast” blink of the
LEDwhileamicroprocessorwouldbeabletodecodeeither
the 12.5% or 87.5% duty cycles as a bad cell fault.
BecausetheLTC4088-1isa3-terminalPowerPathproduct,
system load is always prioritized over battery charging.
Due to excessive system load, there may not be sufficient
power to charge the battery beyond the bad cell threshold
voltage within the bad cell timeout period. In this case the
battery charger will falsely indicate a bad cell. System
software may then reduce the load and reset the battery
charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
C/X Determination
The current exiting the C/X pin represents 1/1031th of
the battery charge current. With a resistor from C/X to
ground that is X/10 times the resistor at the PROG pin,
the CHRG pin releases when the battery current drops to
C/X. For example, if C/10 detection is desired, RC/X should
be made equal to RPROG. For C/20, RC/X would be twice
RPROG. The current threshold at which CHRG will change
state is given by:
I
V
R
BAT
c X
= /
/
1031
With this design, C/10 detection can be achieved with only
one resistor rather than a resistor for both the C/X pin and
the PROG pin. Since both of these pins have 1/1031 of the
battery charge current in them, their voltages will be equal
when they have the same resistor value. Therefore, rather
than using two resistors, the C/X pin and the PROG pin can
be connected together and the resistors can be paralleled
to a single resistor of 1/2 of the program resistor.
OPERATIO
U