参数资料
型号: LTC4088EDE
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 3 A BATTERY CHARGE CONTROLLER, 2.7 kHz SWITCHING FREQ-MAX, PDSO14
封装: 4 X 3 MM, 0.75 MM HEIGHT, PLASTIC, DFN-14
文件页数: 6/24页
文件大小: 272K
代理商: LTC4088EDE
LTC4088
14
4088f
microprocessor. An open-drain output, the
CHRG pin can
drive an indicator LED through a current limiting resis-
tor for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
To make the
CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency (35kHz) to indicate the two possible faults. While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
When charging begins,
CHRGispulledlowandremainslow
for the duration of a normal charge cycle. When charging
is complete, as determined by the criteria set by the C/X
pin, the
CHRG pin is released (Hi-Z). The CHRG pin does
not respond to the C/X threshold if the LTC4088 is in VBUS
current limit. This prevents false end of charge indications
due to insufcient power available to the battery charger. If
a fault occurs while charging, the pin is switched at 35kHz.
While switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
Table 2 illustrates the four possible states of the
CHRG
pin when the battery charger is active.
Table 2.
CHRG Signal
STATUS
FREQUENCY
MODULATION
(BLINK) FREQUENCY
DUTY
CYCLES
Charging
0Hz
0Hz (Low Z)
100%
IBAT < C/X
0Hz
0Hz (Hi-Z)
0%
NTC Fault
35kHz
1.5Hz at 50%
6.25% or 93.75%
Bad Battery
35kHz
6.1Hz at 50%
12.5% or 87.5%
Notice that an NTC fault is represented by a 35kHz pulse
train whose duty cycle toggles between 6.25% and 93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the
CHRG
pin gives the battery fault indication. For this fault, a human
would easily recognize the frantic 6.1Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12.5% or 87.5% duty cycles as a bad cell fault.
Because the LTC4088 is a 3-terminal PowerPath product,
system load is always prioritized over battery charging.
Due to excessive system load, there may not be sufcient
power to charge the battery beyond the bad cell threshold
voltage within the bad cell timeout period. In this case the
battery charger will falsely indicate a bad cell. System
software may then reduce the load and reset the battery
charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
C/X Determination
The current exiting the C/X pin represents 1/1031th of
the battery charge current. With a resistor from C/X to
ground that is X/10 times the resistor at the PROG pin,
the
CHRG pin releases when the battery current drops to
C/X. For example, if C/10 detection is desired, RC/X should
be made equal to RPROG. For C/20, RC/X would be twice
RPROG. The current threshold at which CHRG will change
state is given by:
I
V
R
BAT
CX
= /
/
1031
With this design, C/10 detection can be achieved with only
one resistor rather than a resistor for both the C/X pin and
the PROG pin. Since both of these pins have 1/1031 of the
battery charge current in them, their voltages will be equal
when they have the same resistor value. Therefore, rather
than using two resistors, the C/X pin and the PROG pin can
be connected together and the resistors can be paralleled
to a single resistor of 1/2 of the program resistor.
OPERATIO
U
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